iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Fix testcase	Eddie Hung	2019-06-21	1	-3/+4
*	Add more muxpack tests, with overlapping entries	Eddie Hung	2019-06-21	2	-1/+84
*	Merge branch 'master' into eddie/muxpack	Eddie Hung	2019-06-21	6	-21/+62
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\| *	Update some .gitignore files	Clifford Wolf	2019-06-20	2	-3/+3
\| *	Add proper test for SV-style arrays	Clifford Wolf	2019-06-20	3	-6/+16
\| *	Merge branch 'unpacked_arrays' of https://github.com/towoe/yosys-sv into towo...	Clifford Wolf	2019-06-20	2	-0/+6
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\| \| *	Unpacked array declaration using size	Tobias Wölfel	2019-06-19	2	-0/+6
\| * \|	Merge pull request #1105 from YosysHQ/clifford/fixlogicinit	Clifford Wolf	2019-06-19	2	-14/+37
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\| \| * \|	Add defvalue test, minor autotest fixes for .sv files	Clifford Wolf	2019-06-19	2	-14/+37
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\| * /	Make tests/aiger less chatty	Clifford Wolf	2019-06-19	1	-4/+6
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* \|	Merge remote-tracking branch 'origin/master' into eddie/muxpack	Eddie Hung	2019-06-10	1	-1/+6
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\| *	Add some more comments	Eddie Hung	2019-06-10	1	-1/+6
* \|	Merge branch 'master' into eddie/muxpack	Eddie Hung	2019-06-07	28	-33/+138
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\| *	Test .aag too, by using .aig as reference	Eddie Hung	2019-06-07	1	-0/+19
\| *	Use ABC to convert from AIGER to Verilog	Eddie Hung	2019-06-07	1	-2/+3
\| *	Use ABC to convert AIGER to Verilog, then sat against Yosys	Eddie Hung	2019-06-07	1	-21/+15
\| *	Add symbols to AIGER test inputs for ABC	Eddie Hung	2019-06-07	22	-8/+40
\| *	Merge pull request #1077 from YosysHQ/clifford/pr983	Clifford Wolf	2019-06-07	2	-0/+31
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\| \| *	Merge branch 'pr_elab_sys_tasks' of https://github.com/udif/yosys into cliffo...	Clifford Wolf	2019-06-07	2	-0/+31
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\| \| \| *	Initial implementation of elaboration system tasks	Udi Finkelstein	2019-05-03	2	-0/+31
\| * \| \|	Rename implicit_ports.sv test to implicit_ports.v	Clifford Wolf	2019-06-07	1	-0/+0
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\| * \|	Cleanup tux3-implicit_named_connection	Clifford Wolf	2019-06-07	2	-12/+1
\| * \|	Merge branch 'implicit_named_connection' of https://github.com/tux3/yosys int...	Clifford Wolf	2019-06-07	4	-3/+42
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\| \| * \|	SystemVerilog support for implicit named port connections	tux3	2019-06-06	4	-3/+42
* \| \| \|	Add nonexcl case test, comment out two others	Eddie Hung	2019-06-07	2	-22/+57
* \| \| \|	Add @cliffordwolf freduce testcase	Eddie Hung	2019-06-07	2	-0/+30
* \| \| \|	Add nonexclusive test from @cliffordwolf	Eddie Hung	2019-06-07	2	-0/+28
* \| \| \|	Another muxpack test	Eddie Hung	2019-06-07	2	-0/+32
* \| \| \|	Fix and test for balanced case	Eddie Hung	2019-06-06	2	-0/+41
* \| \| \|	Fix warnings	Eddie Hung	2019-06-06	2	-3/+3
* \| \| \|	Support cascading $pmux.A with $mux.A and $mux.B	Eddie Hung	2019-06-06	2	-0/+40
* \| \| \|	Add non exclusive test	Eddie Hung	2019-06-06	2	-0/+56
* \| \| \|	One more and tidy up	Eddie Hung	2019-06-06	2	-6/+28
* \| \| \|	Add a few more special case tests	Eddie Hung	2019-06-06	2	-0/+51
* \| \| \|	Add tests, fix for !=	Eddie Hung	2019-06-06	2	-0/+78
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* \| \|	Moved tests that fail with Icarus Verilog to /tests/various. Those tests are ...	Maciej Kurc	2019-06-04	4	-0/+46
* \| \|	Added tests for attributes	Maciej Kurc	2019-06-03	9	-0/+219
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* \|	Merge pull request #1049 from YosysHQ/clifford/fix1047	Clifford Wolf	2019-05-28	1	-0/+4
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\| * \|	Do not use shiftmul peepopt pattern when mul result is truncated, fixes #1047	Clifford Wolf	2019-05-28	1	-0/+4
* \| \|	Add actual wandwor test that is part of "make test"	Clifford Wolf	2019-05-28	2	-33/+36
* \| \|	Merge branch 'master' into wandwor	Stefan Biereigel	2019-05-27	2	-0/+76
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\| * \|	Fix init	Eddie Hung	2019-05-24	1	-27/+27
\| * \|	Fix typos	Eddie Hung	2019-05-24	1	-6/+6
\| * \|	Add more tests	Eddie Hung	2019-05-24	2	-20/+41
\| * \|	Call proc	Eddie Hung	2019-05-24	1	-1/+1
\| * \|	Fix duplicate driver	Eddie Hung	2019-05-24	1	-15/+15
\| * \|	Add opt_rmdff tests	Eddie Hung	2019-05-23	2	-0/+55
* \| \|	reformat wand/wor test	Stefan Biereigel	2019-05-27	1	-22/+21
* \| \|	remove port direction workaround from test case	Stefan Biereigel	2019-05-27	1	-2/+1
* \| \|	add simple test case for wand/wor	Stefan Biereigel	2019-05-23	1	-0/+35
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