iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	verilog: support recursive functions using ternary expressions	Zachary Snow	2021-02-12	1	-0/+6
	This adds a mechanism for marking certain portions of elaboration as occurring within unevaluated ternary branches. To enable elaboration of the overall ternary, this also adds width detection for these unelaborated function calls.