iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Various fixes for memories with offsets	Clifford Wolf	2015-02-14	1	-2/+2
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*	Added $meminit support to "memory" command	Clifford Wolf	2015-02-14	1	-15/+8
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*	Added $meminit test case	Clifford Wolf	2015-02-14	1	-0/+30
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*	improvements in muxtree/select_leaves test	Clifford Wolf	2015-01-18	1	-2/+5
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*	Improvements in opt_muxtree	Clifford Wolf	2015-01-18	1	-0/+8
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*	Added support for task and function args in parentheses	Clifford Wolf	2014-10-27	1	-1/+35
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*	Added multi-dim memory test (requires iverilog git head)	Clifford Wolf	2014-08-12	1	-0/+11
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*	Improved scope resolution of local regs in Verilog+AST frontend	Clifford Wolf	2014-08-05	1	-0/+63
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*	Fixed AST handling of variables declared inside a functions main block	Clifford Wolf	2014-08-05	1	-0/+13
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*	Added "make -j{N}" support to "make test"	Clifford Wolf	2014-07-30	1	-1/+1
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*	Added support for "upto" wires to Verilog front- and back-end	Clifford Wolf	2014-07-28	1	-0/+57
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*	Renamed some of the test cases in tests/simple to avoid name collisions	Clifford Wolf	2014-07-25	15	-30/+30
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*	Implemented dynamic bit-/part-select for memory writes	Clifford Wolf	2014-07-17	1	-1/+40
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*	Added support for bit/part select to mem2reg rewriter	Clifford Wolf	2014-07-17	1	-0/+21
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*	Added support for constant bit- or part-select for memory writes	Clifford Wolf	2014-07-17	1	-0/+20
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*	Added note to "make test": use git checkout of iverilog	Clifford Wolf	2014-07-16	1	-1/+1
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*	fixed parsing of constant with comment between size and value	Clifford Wolf	2014-07-02	1	-0/+7
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*	Fixed handling of mixed real/int ternary expressions	Clifford Wolf	2014-06-25	1	-3/+6
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*	Little steps in realmath test bench	Clifford Wolf	2014-06-21	1	-0/+6
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*	Added test case for AstNode::MEM2REG_FL_CMPLX_LHS	Clifford Wolf	2014-06-17	1	-0/+12
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*	Removed long running tests from tests/simple/realexpr.v (replaced by ↵	Clifford Wolf	2014-06-15	1	-55/+0
\| \| \| \|	tests/realmath)
*	Added tests/realmath to "make test"	Clifford Wolf	2014-06-15	1	-1/+0
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*	Added support for math functions	Clifford Wolf	2014-06-14	1	-0/+57
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*	Added realexpr.v test case	Clifford Wolf	2014-06-14	1	-0/+13
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*	added tests for new verilog features	Clifford Wolf	2014-06-07	2	-6/+37
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*	Added tests/simple/repwhile.v	Clifford Wolf	2014-06-06	1	-0/+20
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*	Progress in Verific bindings	Clifford Wolf	2014-03-17	2	-1/+4
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*	Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem)	Clifford Wolf	2014-02-03	1	-0/+39
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*	Bugfix in name resolution with generate blocks	Clifford Wolf	2014-01-30	1	-0/+24
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*	Added correct handling of $memwr priority	Clifford Wolf	2014-01-03	1	-0/+17
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*	Added proper === and !== support in constant expressions	Clifford Wolf	2013-12-27	1	-0/+11
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*	Added multiplier test case from eda playground	Clifford Wolf	2013-12-18	1	-0/+132
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*	Added elsif preproc support	Clifford Wolf	2013-12-18	1	-1/+229
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*	Added support for macro arguments	Clifford Wolf	2013-12-18	1	-0/+9
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*	Various improvements in support for generate statements	Clifford Wolf	2013-12-04	1	-0/+27
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*	Replaced RTLIL::Const::str with generic decoder method	Clifford Wolf	2013-12-04	1	-1/+1
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*	Fix in sincos testbench gen	Clifford Wolf	2013-12-04	1	-1/+1
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*	Added sincos test case	Clifford Wolf	2013-12-04	1	-0/+124
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*	Implemented correct handling of signed module parameters	Clifford Wolf	2013-11-24	1	-1/+7
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*	Added modelsim support to autotest	Clifford Wolf	2013-11-24	1	-0/+21
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*	Another name resolution bugfix for generate blocks	Clifford Wolf	2013-11-20	1	-0/+48
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*	Implemented indexed part selects	Clifford Wolf	2013-11-20	1	-0/+5
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*	Implemented part/bit select on memory read	Clifford Wolf	2013-11-20	1	-0/+41
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*	Added additional mem2reg testcase	Clifford Wolf	2013-11-18	1	-0/+28
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*	Fixed parsing of default cases when not last case	Clifford Wolf	2013-11-18	1	-0/+22
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*	Fixed handling of power operator	Clifford Wolf	2013-11-07	1	-0/+15
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*	Behavior should be identical now to rev. 0b4a64ac6adbd6 (next: testing ↵	Clifford Wolf	2013-11-02	1	-6/+6
\| \| \| \|	before constfold fixes)
*	Various ast changes for early expression width detection (prep for constfold ↵	Clifford Wolf	2013-11-02	1	-0/+7
\| \| \| \|	fixes)
*	Added support for complex set-reset flip-flops in proc_dff	Clifford Wolf	2013-10-24	1	-12/+26
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*	Improved handling of dff with async resets	Clifford Wolf	2013-10-21	1	-0/+39
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