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* Support explicit FIRRTL properties for better accommodation of ↵Jim Lawson2019-07-311-1/+3
| | | | | | | | | FIRRTL/Verilog semantic differences. Use FIRRTL spec vlaues for definition of FIRRTL widths. Added support for '$pos`, `$pow` and `$xnor` cells. Enable tests/simple/operators.v since all operators tested there are now supported. Disable FIRRTL tests of tests/simple/{defvalue.sv,implicit_ports.v,wandwor.v} since they currently generate FIRRTL compilation errors.
* Fix #938 - Crash occurs in case when use write_firrtl commandJim Lawson2019-05-011-0/+1
| | | | | | Add missing memory initialization. Sanity-check memory parameters. Add Cell pointer to memory object (for error reporting).
* Ensure fid() calls make_id() for consistency; tests/simple/dff_init.v failsJim Lawson2019-03-041-0/+1
| | | | Mark dff_init.v as expected to fail since it uses "initial value".
* Fix FIRRTL to Verilog process instance subfield assignment.Jim Lawson2019-02-251-1/+0
| | | | | | Don't emit subfield assignments: bits(x, y, z) <= ... - but instead, add them to the reverse-wire-map where they'll be treated at the end of the module. Enable tests which were disabled due to incorrect treatment of subfields. Assume the `$firrtl2verilog` variable contains any additional switches to control verilog generation (i.e. `--no-dedup -X mverilog`)
* Update cells supported for verilog to FIRRTL conversion.Jim Lawson2019-02-151-0/+26
Issue warning messages for missing parameterized modules and attempts to set initial values. Replace simple "if (cell-type)" with "else if" chain. Fix FIRRTL shift handling. Add support for parameterized modules, $shift, $shiftx. Handle default output file. Deal with no top module. Automatically run pmuxtree pass. Allow EXTRA_FLAGS and SEED parameters to be set in the environment for tests/tools/autotest.mk. Support FIRRTL regression testing in tests/tools/autotest.sh Add xfirrtl files to test directories to exclude files from FIRRTL regression tests that are known to fail.