| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Added memory_bram "make_outreg" feature | Clifford Wolf | 2015-04-09 | 1 | -0/+2 |
| * | Xilinx DRAMS: RAM64X1D, RAM128X1D | Clifford Wolf | 2015-04-09 | 1 | -3/+20 |
| * | Towards DRAM support in Xilinx flow | Clifford Wolf | 2015-04-09 | 1 | -0/+17 |
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index : iCE40/yosys | |
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