| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | xilinx to use abc_map.v with -max_iter 1 | Eddie Hung | 2019-08-20 | 1 | -58/+2 |
| * | Remove sequential extension | Eddie Hung | 2019-08-20 | 1 | -89/+0 |
| * | Wrap SRL{16,32} too | Eddie Hung | 2019-08-20 | 1 | -6/+26 |
| * | Wrap LUTRAMs in order to capture comb/seq behaviour | Eddie Hung | 2019-08-20 | 1 | -0/+44 |
| * | Remove mapping rules | Eddie Hung | 2019-08-20 | 1 | -33/+0 |
| * | Use abc_{map,unmap,model}.v | Eddie Hung | 2019-08-20 | 1 | -0/+148 |
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index : iCE40/yosys | |
| clone of https://github.com/YosysHQ/yosys |
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