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path: root/techlibs/xilinx/abc_map.v
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* Add no MULT no DPORT configEddie Hung2019-09-131-127/+91
* Add support for MULT and DPORTEddie Hung2019-09-131-4/+130
* Rename to techmap_guardEddie Hung2019-09-121-2/+3
* Initial DSP48E1 box supportEddie Hung2019-09-121-0/+216
* Resolve TODO with pin assignments for SRL*Eddie Hung2019-09-041-4/+2
* xilinx to use abc_map.v with -max_iter 1Eddie Hung2019-08-201-13/+13
* Remove sequential extensionEddie Hung2019-08-201-97/+0
* LUTMUX -> LUTMUX6Eddie Hung2019-08-201-2/+2
* Remove delays from abc_map.vEddie Hung2019-08-201-5/+2
* TypoEddie Hung2019-08-201-1/+1
* Wrap SRL{16,32} tooEddie Hung2019-08-201-0/+36
* Wrap LUTRAMs in order to capture comb/seq behaviourEddie Hung2019-08-201-0/+69
* Use abc_{map,unmap,model}.vEddie Hung2019-08-201-0/+120