| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | machxo2: Improve LUT4 techmap. Use same output port name for LUT4 as Lattice. | William D. Jones | 2021-02-23 | 2 | -4/+4 |
| * | machxo2: Add dff.ys test, fix another cells_map.v typo. | William D. Jones | 2021-02-23 | 1 | -1/+1 |
| * | machxo2: Fix more oversights in machxo2 models. logic.ys test passes. | William D. Jones | 2021-02-23 | 2 | -2/+6 |
| * | machxo2: Fix typos. test/arch/run-test.sh passes. | William D. Jones | 2021-02-23 | 2 | -2/+2 |
| * | machxo2: Create basic techlibs and synth_machxo2 pass. | William D. Jones | 2021-02-23 | 4 | -0/+320 |
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index : iCE40/yosys | |
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