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* machxo2: Use `memory_libmap` pass.Marcelina Koƛcielnicka2022-05-187-1/+578
* iopadmap: Add native support for negative-polarity output enable.Marcelina Koƛcielnicka2021-11-093-5/+5
* Blackbox all whiteboxes after synthesisgatecat2021-03-171-0/+1
* machxo2: Switch to LUT4 sim model which propagates less undefined/don't care ...William D. Jones2021-02-231-11/+5
* machxo2: Add experimental status to help.William D. Jones2021-02-231-1/+1
* machxo2: Add DCCA and DCMA blackbox primitives.William D. Jones2021-02-231-0/+17
* machxo2: Fix reversed interpretation of REG_SD config bits.William D. Jones2021-02-231-2/+2
* machxo2: Tristate is active-low.William D. Jones2021-02-232-5/+5
* machxo2: Fix typos in FACADE_FF sim model.William D. Jones2021-02-231-5/+4
* machxo2: Fix naming of TRELLIS_IO ports to match PIO pins in routing graph.William D. Jones2021-02-232-6/+6
* machxo2: Improve help_mode output in synth_machxo2.William D. Jones2021-02-231-5/+5
* machxo2: Use attrmvcp pass to move LOC and src attributes from ports/wires to...William D. Jones2021-02-232-1/+17
* machxo2: Add missing OSCH oscillator primitive.William D. Jones2021-02-231-0/+10
* machxo2: Add -noiopad option to synth_machxo2.William D. Jones2021-02-231-2/+11
* machxo2: Use correct INITVAL for LUT1 in FACADE_SLICE.William D. Jones2021-02-231-1/+1
* machxo2: Fix cells_sim typo where OFX1 was multiply-driven.William D. Jones2021-02-231-1/+1
* machxo2: synth_machxo2 now maps ports to FACADE_IO.William D. Jones2021-02-232-0/+12
* machxo2: Add initial value for Q in FACADE_FF.William D. Jones2021-02-231-0/+2
* machxo2: Add FACADE_IO simulation model. More comments on models.William D. Jones2021-02-231-0/+25
* machxo2: Add FACADE_SLICE simulation model.William D. Jones2021-02-231-0/+83
* machxo2: Improve FACADE_FF simulation model.William D. Jones2021-02-231-12/+20
* machxo2: Improve LUT4 techmap. Use same output port name for LUT4 as Lattice.William D. Jones2021-02-232-4/+4
* machxo2: Add dff.ys test, fix another cells_map.v typo.William D. Jones2021-02-231-1/+1
* machxo2: Fix more oversights in machxo2 models. logic.ys test passes.William D. Jones2021-02-232-2/+6
* machxo2: Fix typos. test/arch/run-test.sh passes.William D. Jones2021-02-232-2/+2
* machxo2: Create basic techlibs and synth_machxo2 pass.William D. Jones2021-02-234-0/+320