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* Fitting help messages to 80 character widthKrystalDelusion2022-08-241-5/+8
* intel_alm: M10K write-enable is negative-trueLofty2022-03-091-2/+1
* intel_alm: preliminary Arria V supportLofty2021-11-251-3/+8
* Fixing old e-mail addresses and deadnamesClaire Xenia Wolf2021-06-081-1/+1
* intel_alm: Add global buffer insertiongatecat2021-05-151-1/+11
* intel_alm: Add IO buffer insertiongatecat2021-05-151-2/+12
* Blackbox all whiteboxes after synthesisgatecat2021-03-171-0/+1
* intel_alm: better map wide but shallow multipliesDan Ravensloft2020-08-281-2/+6
* intel_alm: Add multiply signedness to cellsDan Ravensloft2020-08-261-4/+4
* intel: move Cyclone V support to intel_almDan Ravensloft2020-08-201-1/+1
* Replace opt_rmdff with opt_dff.Marcelina Koƛcielnicka2020-08-071-3/+2
* intel_alm: direct M10K instantiationDan Ravensloft2020-07-271-1/+2
* intel_alm: increase abc9 -WDan Ravensloft2020-07-261-1/+1
* Revert "intel_alm: direct M10K instantiation"Lofty2020-07-131-2/+1
* intel_alm: direct M10K instantiationDan Ravensloft2020-07-051-1/+2
* intel_alm: DSP inferenceDan Ravensloft2020-07-051-9/+49
* synth_intel_alm: Use dfflegalize.Marcelina Koƛcielnicka2020-07-041-4/+3
* intel_alm: add $__ prefix to MISTRAL_FF_SYNCONLYEddie Hung2020-07-041-1/+1
* intel_alm: ABC9 sequential optimisationsDan Ravensloft2020-07-041-9/+20
* Use C++11 final/override keywords.whitequark2020-06-181-4/+4
* intel_alm: fix DFFE matchingDan Ravensloft2020-06-111-1/+1
* synth_*: no need to explicitly read +/abc9_model.vEddie Hung2020-05-141-1/+0
* intel_alm: direct LUTRAM cell instantiationDan Ravensloft2020-05-071-1/+1
* intel_alm: cleanup duplicationDan Ravensloft2020-04-241-2/+1
* intel_alm: work around a Quartus ICEDan Ravensloft2020-04-231-0/+10
* synth_intel_alm: VQM supportDan Ravensloft2020-04-151-0/+1
* synth_intel_alm: alternative synthesis for Intel FPGAsDan Ravensloft2020-04-151-0/+240