iCE40/yosys - clone of https://github.com/YosysHQ/yosys

	Commit message (Expand)	Author	Age	Files	Lines
*	intel: Map M9K BRAM only on families that have it	Dan Ravensloft	2019-07-23	2	-0/+0
*	Changes in GoWin synth commands and ALU primitive support	Diego H	2018-12-03	1	-8/+8
*	Clean whitespace and permissions in techlibs/intel	Larry Doolittle	2017-10-05	4	-39/+39
*	Tested and working altsyncarm without init files	dh73	2017-10-01	2	-57/+59
*	Adding Cyclone IV (E, GX), Arria 10, Cyclone V and LPM functions (ALTPLL and ...	dh73	2017-10-01	4	-0/+560