| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge pull request #1709 from rqou/coolrunner2_counter | Claire Wolf | 2020-02-27 | 1 | -0/+1 |
| |\ | | | | | Improve CoolRunner-II optimization by using extract_counter pass | ||||
| | * | coolrunner2: Use extract_counter to optimize counters | R. Ou | 2020-02-17 | 1 | -0/+1 |
| | | | | | | | | | | | This tends to make much more efficient pterm usage compared to just throwing the problem at ABC | ||||
| * | | coolrunner2: Separate and improve buffer cell insertion pass | R. Ou | 2020-02-16 | 1 | -0/+1 |
| |/ | | | | | | | The new pass will contain all of the logic for inserting "passthrough" product term and XOR cells as appropriate for the architecture. For example, this commit fixes connecting an input pin directly to another output pin with no logic in between. | ||||
| * | coolrunner2: Add extraction for TFFs | Robert Ou | 2018-03-31 | 1 | -0/+1 |
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| * | coolrunner2: Initial mapping of latches | Robert Ou | 2017-06-25 | 1 | -0/+1 |
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| * | coolrunner2: Initial mapping of DFFs | Robert Ou | 2017-06-25 | 1 | -0/+1 |
| | | | | | | All DFFs map to either FDCP (matches Xilinx) or a custom FDCP_N (negative-edge triggered) | ||||
| * | coolrunner2: Initial techmapping for $sop | Robert Ou | 2017-06-25 | 1 | -0/+1 |
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| * | coolrunner2: Initial commit | Robert Ou | 2017-06-24 | 1 | -0/+4 |
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index : iCE40/yosys | |
| clone of https://github.com/YosysHQ/yosys |
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