Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Renamed stdcells_sim.v to simcells.v and fixed blackbox.v | Clifford Wolf | 2013-11-24 | 1 | -2/+2 |
* | Moved common techlib files to techlibs/common | Clifford Wolf | 2013-09-15 | 1 | -0/+4 |
![]() |
index : iCE40/yosys | |
[no description] |
aboutsummaryrefslogtreecommitdiffstats |
Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Renamed stdcells_sim.v to simcells.v and fixed blackbox.v | Clifford Wolf | 2013-11-24 | 1 | -2/+2 |
* | Moved common techlib files to techlibs/common | Clifford Wolf | 2013-09-15 | 1 | -0/+4 |