| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | anlogic: Fix FF mapping. | Marcelina Kościelnicka | 2020-07-17 | 1 | -12/+12 |
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| * | anlogic: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-14 | 1 | -26/+12 |
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| * | Add force_downto and force_upto wire attributes. | Marcelina Kościelnicka | 2020-05-19 | 1 | -0/+1 |
| | | | | | Fixes #2058. | ||||
| * | Fix anlogic async flop mapping | Eddie Hung | 2020-01-01 | 1 | -8/+8 |
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| * | Merge pull request #750 from Icenowy/anlogic-ff-init | Clifford Wolf | 2019-01-02 | 1 | -14/+14 |
| |\ | | | | | Initialization of Anlogic DFFs | ||||
| | * | anlogic: set the init value of DFFs | Icenowy Zheng | 2018-12-18 | 1 | -14/+14 |
| | | | | | | | | | | | | | | | | | | | | | As dffinit has already supported for different initialization strings for DFFs and check for re-initialization, initialization of Anlogic DFFs are now ready to go. Support for set the init values of Anlogic DFFs. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> | ||||
| * | | anlogic: add latch cells | Icenowy Zheng | 2018-12-25 | 1 | -0/+12 |
| |/ | | | | | | | Add latch cells to Anlogic cells replacement library by copying other FPGAs' latch code to it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> | ||||
| * | Initial support for Anlogic FPGA | Miodrag Milanovic | 2018-12-01 | 1 | -0/+49 |
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index : iCE40/yosys | |
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