| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | anlogic: Fix FF mapping. | Marcelina Kościelnicka | 2020-07-17 | 1 | -12/+12 |
| * | anlogic: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-14 | 1 | -26/+12 |
| * | Add force_downto and force_upto wire attributes. | Marcelina Kościelnicka | 2020-05-19 | 1 | -0/+1 |
| * | Fix anlogic async flop mapping | Eddie Hung | 2020-01-01 | 1 | -8/+8 |
| * | Merge pull request #750 from Icenowy/anlogic-ff-init | Clifford Wolf | 2019-01-02 | 1 | -14/+14 |
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| | * | anlogic: set the init value of DFFs | Icenowy Zheng | 2018-12-18 | 1 | -14/+14 |
| * | | anlogic: add latch cells | Icenowy Zheng | 2018-12-25 | 1 | -0/+12 |
| |/ | |||||
| * | Initial support for Anlogic FPGA | Miodrag Milanovic | 2018-12-01 | 1 | -0/+49 |
 |
index : iCE40/yosys | |
| clone of https://github.com/YosysHQ/yosys |
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