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* Added avail params to ilang format, check module params in 'hierarchy -check'Clifford Wolf2016-10-221-0/+4
* Added "setparam -type"Clifford Wolf2016-10-191-3/+13
* Bugfix in "miter -assert" handling of assumptionsClifford Wolf2016-10-171-2/+2
* Added clk2fflogic support for $dffsr and $dlatchClifford Wolf2016-10-171-1/+57
* Improvements and bugfixes in clk2fflogicClifford Wolf2016-10-161-13/+21
* Build fixes for VS 2015Clifford Wolf2016-10-162-1/+4
* Some minor build fixes for Visual CClifford Wolf2016-10-141-2/+11
* Avoid using strcasecmp()Clifford Wolf2016-10-141-2/+21
* Added clk2fflogicClifford Wolf2016-10-142-0/+154
* Added opt_rmdff support for $ff cellsClifford Wolf2016-10-141-5/+13
* Added $global_clock verilog syntax support for creating $ff cellsClifford Wolf2016-10-141-7/+19
* Added MEMID handling to "flatten" passClifford Wolf2016-10-141-0/+6
* Added "zinit" passClifford Wolf2016-10-122-0/+152
* Added $ff and $_FF_ cell typesClifford Wolf2016-10-122-8/+50
* Added "opt_rmdff -keepdc"Clifford Wolf2016-09-302-7/+20
* Cosmetic fix in test_autotb.ccClifford Wolf2016-09-191-2/+2
* Avoid creating very long strings in test_autotbClifford Wolf2016-09-191-4/+10
* Bugfix in techmap parameter handlingClifford Wolf2016-09-141-1/+1
* Typo fix.Kaj Tuomi2016-09-081-1/+1
* Improvements in assertpmuxClifford Wolf2016-09-071-21/+158
* Added assertpmuxClifford Wolf2016-09-072-0/+104
* Added "tee +INT -INT"Clifford Wolf2016-09-061-0/+10
* Run log_flush() before solving in sat commandClifford Wolf2016-09-061-0/+3
* Improved init spec handling in opt_rmdff, modernized the code a bitClifford Wolf2016-08-301-39/+82
* Removed $predict againClifford Wolf2016-08-283-3/+2
* Improved "show" help messageClifford Wolf2016-08-281-3/+5
* Fixed handling of transparent bram rd ports on ROMsClifford Wolf2016-08-271-0/+3
* Fixed bug in memory_share for memory ports with different ABITSClifford Wolf2016-08-221-0/+6
* Added "wreduce -memx"Clifford Wolf2016-08-201-3/+14
* Added memory_memx pass, "memory -memx", and "prep -memx"Clifford Wolf2016-08-193-2/+104
* Optimize memory address port width in wreduce and memory_collect, not verilog...Clifford Wolf2016-08-192-3/+31
* Bugfix in test_autotbClifford Wolf2016-08-181-0/+4
* Fixed use-after-free dict<> usage pattern in hierarchy.ccClifford Wolf2016-08-161-1/+3
* Minor fixes in show commandClifford Wolf2016-08-161-3/+3
* Fixed some compiler warnings in attrmap commandClifford Wolf2016-08-101-4/+4
* Added "attrmap" commandClifford Wolf2016-08-093-0/+253
* Added "attrmvcp" passClifford Wolf2016-08-092-0/+138
* Undo "preserve wire attributes in iopadmap" change (it was OK before)Clifford Wolf2016-08-081-1/+1
* Added "test_autotb -seed" (and "autotest.sh -S")Clifford Wolf2016-08-061-3/+8
* preserve wire attributes in iopadmapClifford Wolf2016-08-061-1/+1
* Added "insbuf" commandClifford Wolf2016-08-022-0/+95
* Renamed AbstractCellEdgesDatabase::add_cell() to add_edges_from_cell()Clifford Wolf2016-07-251-1/+1
* Improvements in CellEdgesDatabaseClifford Wolf2016-07-241-3/+33
* Added CellEdgesDatabase APIClifford Wolf2016-07-241-0/+96
* Moved SatHelper::setup_init() code to SatHelper::setup()Clifford Wolf2016-07-241-97/+92
* Added $initstate support to "sat" commandClifford Wolf2016-07-231-13/+12
* After reading the SV spec, using non-standard predict() instead of expect()Clifford Wolf2016-07-213-3/+3
* Added basic support for $expect cellsClifford Wolf2016-07-133-2/+4
* Minor bugfix in FSM reset state detectionClifford Wolf2016-07-121-2/+5
* Further improved fsm_detect output, attempt to detect self-resetting circuitsClifford Wolf2016-07-091-6/+68
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