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* Extract connection checking logic from expand_module in hierarchy.ccRupert Swarbrick2021-07-201-23/+64
* Extract missing module support in hierarchy.cc to a helper functionRupert Swarbrick2021-07-141-44/+68
* Delete unused found_init variableRupert Swarbrick2021-07-141-3/+0
* rtlil: Make Process handling more uniform with Cell and Wire.Marcelina Kościelnicka2021-07-123-16/+12
* Move interface expansion in hierarchy.cc into a helper classRupert Swarbrick2021-06-161-100/+189
* opt_muxtree: Update port_off and port_idx even for constant bitsgatecat2021-06-111-17/+16
* opt_expr: Fix mul/div/mod by POT patterns to support >= 32 bits.Marcelina Kościelnicka2021-06-091-122/+85
* opt_expr: Optimize div/mod by const 1.Marcelina Kościelnicka2021-06-091-4/+4
* Merge pull request #2817 from YosysHQ/claire/fixemailsClaire Xen2021-06-09149-154/+154
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| * Fix deadname SVN linksClaire Xenia Wolf2021-06-092-3/+3
| * Use HTTPS for website links, gatecat emailClaire Xenia Wolf2021-06-091-1/+1
| * Fixing old e-mail addresses and deadnamesClaire Xenia Wolf2021-06-08149-151/+151
* | autoname: simple perf optimizationsZachary Snow2021-06-081-11/+15
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* memory_map: Improve start_offset handling.Marcelina Kościelnicka2021-05-311-35/+31
* memory_share: Add read port merging.Marcelina Kościelnicka2021-05-291-0/+140
* memory_share: Improve sat-based port sharing.Marcelina Kościelnicka2021-05-281-117/+151
* Make a few passes auto-call Mem::narrow instead of rejecting wide ports.Marcelina Kościelnicka2021-05-281-14/+1
* memory_share: Improve same-address merging, recognize wide write ports.Marcelina Kościelnicka2021-05-271-204/+77
* kernel/mem: Add sub_addr helpers.Marcelina Kościelnicka2021-05-261-6/+2
* mem/extract_rdff: Fix "no FF made" edge case.Marcelina Kościelnicka2021-05-251-2/+5
* memory_bram: Reuse extract_rdff helper for make_outreg.Marcelina Kościelnicka2021-05-251-23/+38
* opt_mem: Add reset/init value support.Marcelina Kościelnicka2021-05-251-0/+12
* memory_bram: Respect write port priority.Marcelina Kościelnicka2021-05-251-0/+14
* opt_mem_feedback: Respect write port priority.Marcelina Kościelnicka2021-05-251-0/+15
* Add memory_narrow pass.Marcelina Kościelnicka2021-05-252-0/+68
* memory_share: Add wide port support.Marcelina Kościelnicka2021-05-251-0/+6
* opt_mem_feedback: Add wide port support.Marcelina Kościelnicka2021-05-251-14/+24
* memory_map: Add wide port support.Marcelina Kościelnicka2021-05-251-16/+17
* sim: Add wide port support.Marcelina Kościelnicka2021-05-251-3/+3
* Reject wide ports in some passes that will never support them.Marcelina Kościelnicka2021-05-251-0/+14
* opt_mem_feedback: Rewrite feedback path finding logic.Marcelina Kościelnicka2021-05-241-115/+130
* opt_mem_feedback: Convert to Mem helpers.Marcelina Kościelnicka2021-05-241-49/+28
* memory_share: Use Mem helpers.Marcelina Kościelnicka2021-05-231-89/+71
* extract_rdff: Add initvals parameter.Marcelina Kościelnicka2021-05-232-9/+15
* memory_share: Split off feedback path finding as a separate pass.Marcelina Kościelnicka2021-05-234-242/+343
* Add new helper class for merging FFs into cells, use for memory_dff.Marcelina Kościelnicka2021-05-231-237/+104
* opt_mem: Remove write ports with const-0 EN.Marcelina Kościelnicka2021-05-231-0/+12
* memory_memx: Use Mem helper.Marcelina Kościelnicka2021-05-221-42/+31
* kernel/rtlil: Extract some helpers for checking memory cell types.Marcelina Kościelnicka2021-05-225-24/+7
* memory_dff: Use Mem helper.Marcelina Kościelnicka2021-05-211-19/+26
* connect: Add -assert option, fix non-working sigmap.Marcelina Kościelnicka2021-05-081-4/+24
* opt_dff: Fix NOT gates wired in reverse.Marcelina Kościelnicka2021-05-041-2/+2
* flatten: rewrite memid in memwr actions.whitequark2021-04-091-0/+3
* equiv: Suggest running async2sync or clk2fflogic where appropriate.Marcelina Kościelnicka2021-03-302-3/+10
* abc9: uniquify blackboxes like whiteboxes (#2695)Eddie Hung2021-03-291-10/+6
* abc9: fix SCC issues (#2694)Eddie Hung2021-03-292-28/+52
* Clarify bugpoint documentation regarding outputIris Johnson2021-03-241-0/+2
* bugpoint: add runner optionZachary Snow2021-03-171-6/+17
* blackbox: Include whiteboxed modulesgatecat2021-03-171-1/+2
* proc_arst: Add special-casing of clock signal in conditionals.Marcelina Kościelnicka2021-03-151-23/+51