Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Import more std:: stuff into Yosys namespace | Clifford Wolf | 2015-10-25 | 1 | -1/+1 |
* | Added "test_cell -noeval" | Clifford Wolf | 2015-09-25 | 1 | -1/+10 |
* | Re-created command-reference-manual.tex, copied some doc fixes to online help | Clifford Wolf | 2015-08-14 | 2 | -2/+2 |
* | Spell check (by Larry Doolittle) | Clifford Wolf | 2015-08-14 | 1 | -1/+1 |
* | Fixed trailing whitespaces | Clifford Wolf | 2015-07-02 | 1 | -3/+3 |
* | Renamed "aig" to "aigmap" | Clifford Wolf | 2015-06-10 | 1 | -4/+4 |
* | Fixed cellaigs port extending | Clifford Wolf | 2015-06-10 | 1 | -0/+7 |
* | Replaced ezDefaultSAT with ezSatPtr | Clifford Wolf | 2015-02-21 | 2 | -17/+17 |
* | Some test related fixes | Clifford Wolf | 2015-02-12 | 1 | -1/+1 |
* | Added ENABLE_NDEBUG makefile options | Clifford Wolf | 2015-01-24 | 1 | -2/+2 |
* | Replaced std::unordered_map as implementation for Yosys::dict | Clifford Wolf | 2014-12-26 | 1 | -12/+12 |
* | Added "test_cell -muxdiv" | Clifford Wolf | 2014-12-25 | 1 | -2/+18 |
* | Added "test_cell -w" feature | Clifford Wolf | 2014-12-25 | 1 | -18/+39 |
* | Fixed typo in test_cell | Clifford Wolf | 2014-10-18 | 1 | -1/+1 |
* | Renamed SIZE() to GetSize() because of name collision on Win32 | Clifford Wolf | 2014-10-10 | 3 | -44/+44 |
* | namespace Yosys | Clifford Wolf | 2014-09-27 | 3 | -0/+9 |
* | Added "test_abcloop" command | Clifford Wolf | 2014-09-19 | 2 | -0/+286 |
* | Added $lcu cell type | Clifford Wolf | 2014-09-08 | 1 | -1/+26 |
* | Added "$fa" cell type | Clifford Wolf | 2014-09-08 | 1 | -0/+31 |
* | Added "test_cell -const" | Clifford Wolf | 2014-09-08 | 1 | -2/+45 |
* | Added "test_cell -nosat" | Clifford Wolf | 2014-09-07 | 1 | -59/+73 |
* | Various bug fixes (related to $macc model testing) | Clifford Wolf | 2014-09-06 | 1 | -1/+1 |
* | Added $macc SAT model | Clifford Wolf | 2014-09-06 | 1 | -5/+6 |
* | Added $macc cell type | Clifford Wolf | 2014-09-06 | 1 | -2/+53 |
* | Added "test_cell -script" | Clifford Wolf | 2014-09-06 | 1 | -1/+8 |
* | Removed $bu0 cell type | Clifford Wolf | 2014-09-04 | 1 | -1/+0 |
* | Fixed "test_cells -vlog" | Clifford Wolf | 2014-09-03 | 1 | -4/+6 |
* | Improvements in "test_cell -vlog" | Clifford Wolf | 2014-09-02 | 1 | -3/+8 |
* | Added test_cell -vlog | Clifford Wolf | 2014-09-02 | 1 | -2/+79 |
* | Added SAT testing to test_cell eval stage | Clifford Wolf | 2014-09-02 | 1 | -1/+89 |
* | Added $alu support to test_cell | Clifford Wolf | 2014-09-01 | 1 | -1/+22 |
* | Added "test_cell -simlib -v" | Clifford Wolf | 2014-09-01 | 1 | -8/+29 |
* | Added eval testing to test_cell | Clifford Wolf | 2014-08-31 | 1 | -0/+88 |
* | Added $lut support in test_cell, techmap, satgen | Clifford Wolf | 2014-08-31 | 1 | -5/+28 |
* | Changed backend-api from FILE to std::ostream | Clifford Wolf | 2014-08-23 | 1 | -93/+93 |
* | Added "test_cell -s <seed>" | Clifford Wolf | 2014-08-16 | 1 | -5/+17 |
* | RIP $safe_pmux | Clifford Wolf | 2014-08-14 | 1 | -1/+0 |
* | More cleanups related to RTLIL::IdString usage | Clifford Wolf | 2014-08-02 | 1 | -22/+22 |
* | Added "test_autotb -n <num_iter>" option | Clifford Wolf | 2014-08-01 | 1 | -9/+27 |
* | Renamed port access function on RTLIL::Cell, added param access functions | Clifford Wolf | 2014-07-31 | 1 | -3/+3 |
* | Added "techmap -assert" | Clifford Wolf | 2014-07-31 | 1 | -1/+1 |
* | Improvements in test_cell | Clifford Wolf | 2014-07-30 | 1 | -35/+89 |
* | Added "test_cell" command | Clifford Wolf | 2014-07-29 | 2 | -0/+185 |
* | Renamed "write_autotest" to "test_autotb" and moved to passes/tests/ | Clifford Wolf | 2014-07-29 | 2 | -0/+338 |