index
:
iCE40/yosys
master
[no description]
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
passes
/
techmap
/
Makefile.inc
Commit message (
Expand
)
Author
Age
Files
Lines
*
alumacc skeleton
Clifford Wolf
2014-09-14
1
-0
/
+1
*
Added "maccmap" command
Clifford Wolf
2014-09-07
1
-0
/
+1
*
Renamed "stdcells.v" to "techmap.v"
Clifford Wolf
2014-07-31
1
-3
/
+3
*
Added "make SMALL=1"
Clifford Wolf
2014-07-24
1
-1
/
+4
*
Added "make PRETTY=1"
Clifford Wolf
2014-07-24
1
-6
/
+6
*
OSX compatible creation of stdcells.inc, using code from github.com/Siesh1oo/...
Clifford Wolf
2014-03-11
1
-2
/
+3
*
Moved some passes to other source directories
Clifford Wolf
2014-02-08
1
-0
/
+1
*
Added hilomap command
Clifford Wolf
2014-01-19
1
-0
/
+1
*
Added simplemap pass
Clifford Wolf
2013-11-24
1
-0
/
+1
*
Added iopadmap pass
Clifford Wolf
2013-10-16
1
-0
/
+1
*
Moved dfflibmap from passes/dfflibmap to passes/techmap
Clifford Wolf
2013-10-16
1
-1
/
+10
*
Moved common techlib files to techlibs/common
Clifford Wolf
2013-09-15
1
-1
/
+1
*
Removed date from auto-generated passes/techmap/stdcells.inc
Clifford Wolf
2013-03-18
1
-2
/
+1
*
add header to autogenerated file on its origin
Johann Glaser
2013-03-18
1
-1
/
+3
*
initial import
Clifford Wolf
2013-01-05
1
-0
/
+11