index
:
iCE40/yosys
master
[no description]
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
passes
/
proc
/
proc_rmdead.cc
Commit message (
Expand
)
Author
Age
Files
Lines
*
proc_rmdead: use explicit pattern set when there are no wildcards
Zachary Snow
2021-07-29
1
-2
/
+63
*
Fixing old e-mail addresses and deadnames
Claire Xenia Wolf
2021-06-08
1
-1
/
+1
*
Use C++11 final/override keywords.
whitequark
2020-06-18
1
-2
/
+2
*
kernel: use more ID::*
Eddie Hung
2020-04-02
1
-2
/
+2
*
Improve proc full_case detection and handling, fixes #931
Clifford Wolf
2019-04-18
1
-5
/
+13
*
Revert "Recognise default entry in case even if all cases covered (fix for #9...
Eddie Hung
2019-04-15
1
-1
/
+1
*
Recognise default entry in case even if all cases covered (#931)
Eddie Hung
2019-04-11
1
-1
/
+1
*
Consistent use of 'override' for virtual methods in derived classes.
Henner Zeller
2018-07-20
1
-2
/
+2
*
Added "yosys -D" feature
Clifford Wolf
2016-04-21
1
-1
/
+1
*
Preserve empty $pmux default cases
Clifford Wolf
2016-03-31
1
-2
/
+2
*
Fixed trailing whitespaces
Clifford Wolf
2015-07-02
1
-3
/
+3
*
Renamed SIZE() to GetSize() because of name collision on Win32
Clifford Wolf
2014-10-10
1
-1
/
+1
*
namespace Yosys
Clifford Wolf
2014-09-27
1
-1
/
+5
*
Fixed handling of constant-true branches in proc_clean
Clifford Wolf
2014-08-12
1
-1
/
+1
*
Using log_assert() instead of assert()
Clifford Wolf
2014-07-28
1
-1
/
+0
*
Using new obj iterator API in a few places
Clifford Wolf
2014-07-27
1
-5
/
+5
*
Refactoring: Renamed RTLIL::Design::modules to modules_
Clifford Wolf
2014-07-27
1
-1
/
+1
*
Added help messages to proc_* passes
Clifford Wolf
2013-03-01
1
-10
/
+24
*
initial import
Clifford Wolf
2013-01-05
1
-0
/
+87