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proc
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proc_dff.cc
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Author
Age
Files
Lines
*
Fixing old e-mail addresses and deadnames
Claire Xenia Wolf
2021-06-08
1
-1
/
+1
*
proc_dff: Fix emitted FF when a register is not assigned in async reset
Marcelina KoĆcielnicka
2021-03-08
1
-0
/
+4
*
Use C++11 final/override keywords.
whitequark
2020-06-18
1
-2
/
+2
*
kernel: big fat patch to use more ID::*, otherwise ID(*)
Eddie Hung
2020-04-02
1
-63
/
+63
*
kernel: use more ID::*
Eddie Hung
2020-04-02
1
-30
/
+30
*
Consistent use of 'override' for virtual methods in derived classes.
Henner Zeller
2018-07-20
1
-2
/
+2
*
Add warnings for driver-driver conflicts between FFs (and other cells) and co...
Clifford Wolf
2017-12-12
1
-2
/
+3
*
Added $global_clock verilog syntax support for creating $ff cells
Clifford Wolf
2016-10-14
1
-7
/
+19
*
Added "yosys -D" feature
Clifford Wolf
2016-04-21
1
-1
/
+1
*
Fixed trailing whitespaces
Clifford Wolf
2015-07-02
1
-3
/
+3
*
Added log_warning() API
Clifford Wolf
2014-11-09
1
-2
/
+2
*
namespace Yosys
Clifford Wolf
2014-09-27
1
-5
/
+9
*
Renamed port access function on RTLIL::Cell, added param access functions
Clifford Wolf
2014-07-31
1
-44
/
+44
*
Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace
Clifford Wolf
2014-07-31
1
-3
/
+3
*
Using log_assert() instead of assert()
Clifford Wolf
2014-07-28
1
-2
/
+1
*
Using new obj iterator API in a few places
Clifford Wolf
2014-07-27
1
-6
/
+6
*
Refactoring: Renamed RTLIL::Design::modules to modules_
Clifford Wolf
2014-07-27
1
-1
/
+1
*
Manual fixes for new cell connections API
Clifford Wolf
2014-07-26
1
-4
/
+4
*
Changed users of cell->connections_ to the new API (sed command)
Clifford Wolf
2014-07-26
1
-45
/
+45
*
Renamed RTLIL::{Module,Cell}::connections to connections_
Clifford Wolf
2014-07-26
1
-45
/
+45
*
Use only module->addCell() and module->remove() to create and delete cells
Clifford Wolf
2014-07-25
1
-52
/
+13
*
Replaced more old SigChunk programming patterns
Clifford Wolf
2014-07-24
1
-1
/
+1
*
Removed RTLIL::SigSpec::optimize()
Clifford Wolf
2014-07-23
1
-4
/
+0
*
SigSpec refactoring: using the accessor functions everywhere
Clifford Wolf
2014-07-22
1
-41
/
+41
*
SigSpec refactoring: renamed chunks and width to __chunks and __width
Clifford Wolf
2014-07-22
1
-41
/
+41
*
Replaced depricated NEW_WIRE macro with module->addWire() calls
Clifford Wolf
2014-07-21
1
-10
/
+10
*
Do not create $dffsr cells with no-op resets in proc_dff
Clifford Wolf
2014-06-19
1
-0
/
+5
*
Added support for complex set-reset flip-flops in proc_dff
Clifford Wolf
2013-10-24
1
-4
/
+115
*
Improved handling of dff with async resets
Clifford Wolf
2013-10-21
1
-5
/
+60
*
Added dffsr support to proc_dff pass
Clifford Wolf
2013-10-18
1
-7
/
+72
*
fixed typos
Johann Glaser
2013-03-18
1
-2
/
+2
*
Added help messages to proc_* passes
Clifford Wolf
2013-03-01
1
-6
/
+18
*
initial import
Clifford Wolf
2013-01-05
1
-0
/
+178