iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	kernel: big fat patch to use more ID::, otherwise ID()	Eddie Hung	2020-04-02	1	-6/+6
*	Use ID::keep more liberally too	Eddie Hung	2019-08-15	1	-1/+1
*	Use more ID::{A,B,Y,blackbox,whitebox}	Eddie Hung	2019-08-15	1	-12/+12
*	Use ID() macro in all of passes/opt/	Clifford Wolf	2019-08-11	1	-21/+21
*	Make liberal use of IdString.in()	Eddie Hung	2019-08-06	1	-1/+1
*	Fix handling of glob_abort_cnt in opt_muxtree, fixes #1002	Clifford Wolf	2019-05-12	1	-3/+11
*	Add log_debug() framework	Clifford Wolf	2019-04-22	1	-3/+3
*	Add iteration limit to "opt_muxtree"	Clifford Wolf	2018-11-20	1	-1/+17
*	Consistent use of 'override' for virtual methods in derived classes.	Henner Zeller	2018-07-20	1	-2/+2
*	Added "yosys -D" feature	Clifford Wolf	2016-04-21	1	-1/+1
*	Fixed typo in log message	Andrew Zonenberg	2016-03-30	1	-1/+1
*	Bugfixes in handling of "keep" attribute on wires	Clifford Wolf	2015-10-15	1	-1/+1
*	Fixed trailing whitespaces	Clifford Wolf	2015-07-02	1	-3/+3
*	Using design->selected_modules() in opt_*	Clifford Wolf	2015-02-03	1	-8/+3
*	Fixed opt_muxtree performance bug	Clifford Wolf	2015-01-21	1	-11/+28
*	Improvements in opt_muxtree	Clifford Wolf	2015-01-18	1	-35/+50
*	More opt_muxtree cleanups	Clifford Wolf	2015-01-18	1	-64/+44
*	Various cleanups and improvements in opt_muxtree	Clifford Wolf	2015-01-18	1	-87/+71
*	Fixed a bug in opt_muxtree for "mux forests"	Clifford Wolf	2015-01-17	1	-4/+18
*	Improved opt_muxtree	Clifford Wolf	2015-01-17	1	-4/+38
*	Do not the 'z' modifier in format string (another win32 fix)	Clifford Wolf	2014-10-11	1	-2/+2
*	namespace Yosys	Clifford Wolf	2014-09-27	1	-0/+4
*	Added design->scratchpad	Clifford Wolf	2014-08-30	1	-2/+2
*	RIP $safe_pmux	Clifford Wolf	2014-08-14	1	-1/+1
*	Renamed port access function on RTLIL::Cell, added param access functions	Clifford Wolf	2014-07-31	1	-11/+11
*	Using log_assert() instead of assert()	Clifford Wolf	2014-07-28	1	-1/+0
*	Using new obj iterator API in a few places	Clifford Wolf	2014-07-27	1	-12/+11
*	Refactoring: Renamed RTLIL::Design::modules to modules_	Clifford Wolf	2014-07-27	1	-1/+1
*	Refactoring: Renamed RTLIL::Module::cells to cells_	Clifford Wolf	2014-07-27	1	-1/+1
*	Refactoring: Renamed RTLIL::Module::wires to wires_	Clifford Wolf	2014-07-27	1	-1/+1
*	Changed users of cell->connections_ to the new API (sed command)	Clifford Wolf	2014-07-26	1	-13/+13
*	Renamed RTLIL::{Module,Cell}::connections to connections_	Clifford Wolf	2014-07-26	1	-13/+13
*	Use only module->addCell() and module->remove() to create and delete cells	Clifford Wolf	2014-07-25	1	-4/+2
*	Removed RTLIL::SigSpec::expand() method	Clifford Wolf	2014-07-23	1	-5/+7
*	SigSpec refactoring: using the accessor functions everywhere	Clifford Wolf	2014-07-22	1	-7/+7
*	SigSpec refactoring: renamed chunks and width to __chunks and __width	Clifford Wolf	2014-07-22	1	-7/+7
*	Fixed performance problem in opt_mux with nets driven by many conflicting dri...	Clifford Wolf	2014-03-19	1	-1/+6
*	Cleanups and bugfixes in response to new internal cell checker	Clifford Wolf	2013-11-11	1	-2/+2
*	fixed typos	Johann Glaser	2013-03-18	1	-1/+1
*	Minor hotfixes (mostly gcc build fixes)	Clifford Wolf	2013-03-03	1	-0/+2
*	Added help messages for opt_* passes	Clifford Wolf	2013-03-01	1	-2/+20
*	initial import	Clifford Wolf	2013-01-05	1	-0/+417