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* Refactoring: Renamed RTLIL::Design::modules to modules_Clifford Wolf2014-07-271-1/+1
* Refactoring: Renamed RTLIL::Module::cells to cells_Clifford Wolf2014-07-271-1/+1
* Added help messages for fsm_* passesClifford Wolf2013-03-011-9/+21
* initial importClifford Wolf2013-01-051-0/+46