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* Rst docs conversion (#3496)KrystalDelusion2022-11-151-0/+2
| | | Rst docs conversion
* remove extra space in formatingKamyar Mohajerani2022-09-221-2/+2
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* stat: add tech tech-specific utilizations to jsonKamyar Mohajerani2022-09-221-65/+91
| | | | | - refactor resource util. estimation/calculations for Xilinx and CMOS - don't print log_header if "-json" is set
* Merge pull request #3449 from YosysHQ/aki/show_pathrwN. Engelhardt2022-08-251-0/+1
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| * yosys: passes: cmds: show: added filename re-writing to `show -lib`Aki Van Ness2022-08-221-0/+1
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* | Fitting help messages to 80 character widthKrystalDelusion2022-08-247-48/+54
|/ | | | | | | | | Uses the regex below to search (using vscode): ^\t\tlog\("(.{10,}(?<!\\n)|.{81,}\\n)"\); Finds any log messages double indented (which help messages are) and checks if *either* there are is no newline character at the end, *or* the number of characters before the newline is more than 80.
* rename: Add -witness modeJannis Harder2022-08-161-0/+81
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* setundef: Do not add anyseq / anyconst to unused memory port clocksJannis Harder2022-08-161-0/+24
| | | | Instead set those unused clocks to zero.
* Add the $anyinit cell and the formalff passJannis Harder2022-08-161-0/+1
| | | | | | | These can be used to protect undefined flip-flop initialization values from optimizations that are not sound for formal verification and can help mapping all solver-provided values in witness traces for flows that use different backends simultaneously.
* Merge pull request #3425 from YosysHQ/lofty/stat-jsonN. Engelhardt2022-08-111-38/+109
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| * stat: add option for machine-readable json outputLofty2022-08-111-38/+109
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* | rename: add -scramble-name option to randomly rename selectionsLofty2022-08-081-0/+56
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* Merge pull request #3196 from bfg86/bfg86/renameN. Engelhardt2022-06-131-4/+13
|\ | | | | Add -suffix option to rename -wire
| * Updating help-text with nakengelhardts suggestion.bfg862022-06-131-2/+2
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| * Add -suffix option to rename -wire.bfg862022-02-111-4/+13
| | | | | | | | See #3195
* | Merge pull request #3349 from nakengelhardt/select_count_scratchpadN. Engelhardt2022-06-092-0/+12
|\ \ | | | | | | Make 'stat' and 'select -count' save counts to scratchpad
| * | also make 'stat' save counts to scratchpadN. Engelhardt2022-06-011-0/+9
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| * | have 'select -count' save the count to scratchpad entry 'select.count'N. Engelhardt2022-06-011-0/+3
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* | | sta: warn on unrecognised cells only onceLofty2022-06-081-1/+4
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* | | Fix preventing show crashing with newer graphvizMiodrag Milanovic2022-06-031-1/+6
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* | select: Fix -assert-none and -assert-any error output and docsJannis Harder2022-05-191-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both of these options consider a selection containing only empty modules as non-empty. This wasn't mentioned in the documentation nor did the error message when using `select -assert-none` list those empty modules, which produced a very confusing error message complaining about a non-empty selection followed by an empty listing of the selection. This fixes the documentation and changes the `-assert-none` and `-assert-any` assertion error messages to also output fully selected modules (this includes selected empty modules). It doesn't change the messages for `-assert-count` etc. as they don't count modules.
* | show: Fix width labels.Marcelina Kościelnicka2022-04-041-23/+18
| | | | | | | | See #3266.
* | Merge pull request #2019 from boqwxp/gliftClaire Xen2022-02-112-0/+600
|\ \ | | | | | | Add `glift` command for creating gate-level information flow tracking models and optimization problems
| * | glift: Use ID() rather than string literals.Alberto Gonzalez2020-07-011-11/+11
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| * | glift: Use worker pattern.Alberto Gonzalez2020-07-011-80/+75
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| * | glift: Add support for $_NAND_ and $_NOR_ cells.Alberto Gonzalez2020-07-011-8/+11
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| * | glift: Add support for $_MUX_ and $_NMUX_ cells.Alberto Gonzalez2020-07-011-1/+34
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| * | glift: Add support for $_XOR_ and $_XNOR_ cells.Alberto Gonzalez2020-07-011-15/+79
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| * | glift: Add initial hierarchy support.Alberto Gonzalez2020-07-011-12/+59
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| * | glift: Replace `YS_OVERRIDE` with `override`.Alberto Gonzalez2020-07-011-2/+2
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| * | glift: Add `-simple-cost-model` optionAlberto Gonzalez2020-07-011-20/+45
| | | | | | | | | | | | | | | | | | | | | | | | Rather than assigning specific weights to specific versions of taint tracking logic and summing the weights of all GLIFT cells, sum the following values for each GLIFT cell: - 0 if the associated hole/$anyconst cell value is non-zero, i.e. reduced-precision taint tracking logic is chosen at this cell - 1 if the associated hole/$anyconst cell value is zero, i.e. the full-precision taint tracking logic is chosen at this cell This simplified cost modeling reduces the potential for the QBF-SAT solver to minimize taint tracking logic area but significantly simplifies the QBF-SAT problem.
| * | glift: Add `-instrument-more` option to add 4 more versions of taint ↵Alberto Gonzalez2020-07-011-44/+124
| | | | | | | | | | | | tracking logic. Also refactor a bit and update help text.
| * | glift: Change command names to better represent their functions.Alberto Gonzalez2020-07-011-22/+22
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| * | glift: Add `-create-imprecise` command, rename other commands, and re-work ↵Alberto Gonzalez2020-07-011-28/+54
| | | | | | | | | | | | the help text.
| * | glift: Add replacement scoring and area minimization option.Alberto Gonzalez2020-07-011-3/+56
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| * | glift: Remove outputs by default; add `-keep-outputs` option; properly reset ↵Alberto Gonzalez2020-07-011-12/+43
| | | | | | | | | | | | internal state between calls.
| * | glift: Initial implementation of the `-sketchify` option.Alberto Gonzalez2020-07-011-50/+71
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| * | glift: Initial implementation of GLIFT model construction.Alberto Gonzalez2020-07-011-2/+173
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| * | glift: Add skeleton for `glift` command.Alberto Gonzalez2020-07-012-0/+51
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* | | Add $bmux and $demux cells.Marcelina Kościelnicka2022-01-282-1/+5
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* | bugpoint: avoid infinite loop between -connections and -wires.Catherine2021-12-151-1/+1
| | | | | | | | Fixes #3113.
* | Add clean_zerowidth pass, use it for Verilog output.Marcelina Kościelnicka2021-12-122-1/+212
| | | | | | | | | | | | | | This should remove instances of zero-width sigspecs in the netlist, avoiding problems in the Verilog backend with emitting them. See #3103.
* | sta: very crude static timing analysis passLofty2021-11-252-0/+313
| | | | | | | | Co-authored-by: Eddie Hung <eddie@fpgeh.com>
* | show: Fix wire bit indexing.Marcelina Kościelnicka2021-11-121-3/+16
| | | | | | | | Fixes #3078.
* | Hook up $aldff support in various passes.Marcelina Kościelnicka2021-10-021-1/+1
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* | logger: Add -check-expected subcommand.Marcelina Kościelnicka2021-08-121-0/+9
| | | | | | | | | | This allows us to have multiple "expect this warning" calls in a single long script, covering only as many passes as necessary.
* | Add v2 memory cells.Marcelina Kościelnicka2021-08-111-1/+1
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* | rtlil: Make Process handling more uniform with Cell and Wire.Marcelina Kościelnicka2021-07-122-11/+8
| | | | | | | | | | | | - add a backlink to module from Process - make constructor and destructor protected, expose Module functions to add and remove processes
* | Merge pull request #2817 from YosysHQ/claire/fixemailsClaire Xen2021-06-0935-36/+36
|\ \ | | | | | | Fixing old e-mail addresses and deadnames
| * | Fixing old e-mail addresses and deadnamesClaire Xenia Wolf2021-06-0835-36/+36
| | | | | | | | | | | | | | | | | | | | | | | | s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi; s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi; s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi; s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi; s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;