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Author
Age
Files
Lines
*
More idstring sort_by_* helpers and fixed tpl ordering in techmap
Clifford Wolf
2014-08-15
1
-1
/
+13
*
Added Frontend "+/" filename syntax for files from proc_share_dir
Clifford Wolf
2014-08-15
1
-1
/
+4
*
Added RTLIL::SigSpec::to_sigbit_map()
Clifford Wolf
2014-08-14
2
-0
/
+17
*
Added sig.{replace,remove,extract} variants for std::{map,set} pattern
Clifford Wolf
2014-08-14
2
-25
/
+64
*
Added module->ports
Clifford Wolf
2014-08-14
3
-2
/
+13
*
Refactoring of CellType class
Clifford Wolf
2014-08-14
2
-145
/
+111
*
RIP $safe_pmux
Clifford Wolf
2014-08-14
5
-24
/
+9
*
Fixed SigBit(RTLIL::Wire *wire) constructor
Clifford Wolf
2014-08-12
1
-1
/
+1
*
Another build fix by americanrouter (via reddit)
Clifford Wolf
2014-08-11
1
-0
/
+3
*
Fixed build with gcc-4.6
Clifford Wolf
2014-08-07
3
-3
/
+11
*
Added support for truncating of wires to wreduce pass
Clifford Wolf
2014-08-05
3
-8
/
+53
*
Added RTLIL::IdString::in(...)
Clifford Wolf
2014-08-04
1
-5
/
+18
*
Added query() API to ModIndex
Clifford Wolf
2014-08-03
1
-8
/
+46
*
Added ID() macro for static IdStrings
Clifford Wolf
2014-08-03
1
-0
/
+3
*
Fixed a va_list corruption in logv_error()
Clifford Wolf
2014-08-02
1
-4
/
+3
*
Bugfix in "techmap -extern"
Clifford Wolf
2014-08-02
1
-10
/
+16
*
Removed at() method from RTLIL::IdString
Clifford Wolf
2014-08-02
2
-7
/
+6
*
No implicit conversion from IdString to anything else
Clifford Wolf
2014-08-02
4
-22
/
+22
*
More bugfixes related to new RTLIL::IdString
Clifford Wolf
2014-08-02
3
-17
/
+31
*
Limit size of log_signal buffer to 100 elements
Clifford Wolf
2014-08-02
2
-2
/
+9
*
Improvements in new RTLIL::IdString implementation
Clifford Wolf
2014-08-02
5
-33
/
+65
*
Implemented new reference counting RTLIL::IdString
Clifford Wolf
2014-08-02
2
-15
/
+90
*
Fixed memory corruption related to id2cstr()
Clifford Wolf
2014-08-02
1
-2
/
+2
*
More cleanups related to RTLIL::IdString usage
Clifford Wolf
2014-08-02
2
-63
/
+36
*
Preparations for RTLIL::IdString redesign: cleanup of existing code
Clifford Wolf
2014-08-02
6
-22
/
+61
*
Added logfile hash to statistics footer
Clifford Wolf
2014-08-01
5
-45
/
+79
*
Added per-pass cpu usage statistics
Clifford Wolf
2014-08-01
4
-12
/
+86
*
Added ModIndex helper class, some changes to RTLIL::Monitor
Clifford Wolf
2014-08-01
7
-24
/
+165
*
Packed SigBit::data and SigBit::offset in a union
Clifford Wolf
2014-08-01
2
-10
/
+14
*
Renamed modwalker.h to modtools.h
Clifford Wolf
2014-07-31
1
-2
/
+2
*
Renamed port access function on RTLIL::Cell, added param access functions
Clifford Wolf
2014-07-31
4
-179
/
+206
*
Added "trace" command
Clifford Wolf
2014-07-31
1
-0
/
+3
*
Added RTLIL::Monitor
Clifford Wolf
2014-07-31
2
-96
/
+97
*
Added module->design and cell->module, wire->module pointers
Clifford Wolf
2014-07-31
2
-0
/
+103
*
Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace
Clifford Wolf
2014-07-31
11
-597
/
+653
*
Added "yosys -A"
Clifford Wolf
2014-07-31
1
-1
/
+10
*
Added "yosys -Q"
Clifford Wolf
2014-07-31
1
-26
/
+35
*
Added techmap CONSTMAP feature
Clifford Wolf
2014-07-30
1
-0
/
+3
*
Added write_file command
Clifford Wolf
2014-07-30
2
-5
/
+7
*
Using native ezSAT shift ops in satgen, fixed $shift and $shiftx SAT models
Clifford Wolf
2014-07-30
1
-36
/
+39
*
Added "log_dump_val_worker(char *v)"
Clifford Wolf
2014-07-30
1
-0
/
+1
*
Added "kernel/yosys.h" and "kernel/yosys.cc"
Clifford Wolf
2014-07-30
7
-60
/
+132
*
Added "test_cell" command
Clifford Wolf
2014-07-29
1
-1
/
+1
*
Renamed "write_autotest" to "test_autotb" and moved to passes/tests/
Clifford Wolf
2014-07-29
1
-1
/
+3
*
Added "techmap -map %{design-name}"
Clifford Wolf
2014-07-29
2
-0
/
+10
*
Added $shift and $shiftx cell types (needed for correct part select behavior)
Clifford Wolf
2014-07-29
5
-19
/
+75
*
Added wire->upto flag for signals such as "wire [0:7] x;"
Clifford Wolf
2014-07-28
2
-1
/
+3
*
Using log_assert() instead of assert()
Clifford Wolf
2014-07-28
12
-144
/
+157
*
Added std::initializer_list<> constructor to SigSpec
Clifford Wolf
2014-07-28
2
-0
/
+15
*
Added cover() to all SigSpec constructors
Clifford Wolf
2014-07-28
1
-0
/
+22
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