iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Added "ENABLE_PLUGINS := 0" to verific amd64 build instructions	Clifford Wolf	2014-11-08	1	-0/+1
*	Fixed parsing of "module mymod #( parameter foo = 1, bar = 2 ..."	Clifford Wolf	2014-10-30	1	-4/+5
*	AST simplifier: optimize constant AST_CASE nodes before recursively descending	Clifford Wolf	2014-10-29	1	-31/+35
*	Added support for task and function args in parentheses	Clifford Wolf	2014-10-27	1	-6/+45
*	Improvements in $readmem[bh] implementation	Clifford Wolf	2014-10-26	1	-8/+13
*	Added support for $readmemh/$readmemb	Clifford Wolf	2014-10-26	2	-0/+113
*	Fixed constant "cond ? string1 : string2" with strings of different size	Clifford Wolf	2014-10-25	1	-0/+2
*	Re-introduced Yosys::readsome() helper function	Clifford Wolf	2014-10-23	3	-15/+5
*	minor indenting corrections	Clifford Wolf	2014-10-19	1	-2/+2
*	Builds on Mac 10.9.2 with LLVM 3.5.	Parviz Palangpour	2014-10-19	1	-0/+5
*	Fixed various VS warnings	Clifford Wolf	2014-10-18	1	-1/+1
*	Header changes so it will compile on VS	William Speirs	2014-10-17	2	-4/+10
*	Wrapped math in int constructor	William Speirs	2014-10-17	1	-1/+1
*	Print "SystemVerilog" in "read_verilog -sv" log messages	Clifford Wolf	2014-10-16	1	-1/+1
*	Fixed handling of invalid array access in mem2reg code	Clifford Wolf	2014-10-16	2	-3/+15
*	Updated .gitignore file for ilang and verilog frontends	Clifford Wolf	2014-10-15	2	-8/+8
*	Replaced readsome() with read() and gcount()	Clifford Wolf	2014-10-15	1	-3/+5
*	Updated lexers & parsers to include prefixes	William Speirs	2014-10-15	6	-27/+35
*	Added make_temp_{file,dir}() and remove_directory() APIs	Clifford Wolf	2014-10-12	1	-18/+8
*	Added run_command() api to replace system() and popen()	Clifford Wolf	2014-10-12	1	-15/+4
*	Do not the 'z' modifier in format string (another win32 fix)	Clifford Wolf	2014-10-11	1	-2/+2
*	Fixed win32 troubles with f.readsome()	Clifford Wolf	2014-10-11	3	-3/+3
*	Disabled vhdl2verilog command for win32 builds	Clifford Wolf	2014-10-11	1	-0/+5
*	Added format __attribute__ to stringf()	Clifford Wolf	2014-10-10	1	-1/+1
*	Renamed SIZE() to GetSize() because of name collision on Win32	Clifford Wolf	2014-10-10	5	-29/+29
*	namespace Yosys	Clifford Wolf	2014-09-27	5	-20/+29
*	Another $clog2 bugfix	Clifford Wolf	2014-09-08	1	-0/+2
*	Fixed $clog2 (off by one error)	Clifford Wolf	2014-09-06	1	-2/+2
*	Fixed assignment of out-of bounds array element	Clifford Wolf	2014-09-06	1	-2/+26
*	Corrected spelling mistakes found by lintian	Ruben Undheim	2014-09-06	4	-4/+4
*	Removed $bu0 cell type	Clifford Wolf	2014-09-04	1	-5/+5
*	Removed compatbility.{h,cc}: Not using open_memstream/fmemopen anymore	Clifford Wolf	2014-08-23	1	-4/+1
*	Changed frontend-api from FILE to std::istream	Clifford Wolf	2014-08-23	11	-34/+46
*	Added emscripten (emcc) support to build system and some build fixes	Clifford Wolf	2014-08-22	2	-1/+17
*	Added support for non-standard <plugin>:<c_name> DPI syntax	Clifford Wolf	2014-08-22	1	-0/+12
*	Archibald Rust and Clifford Wolf: ffi-based dpi_call()	Clifford Wolf	2014-08-22	1	-6/+90
*	Fixed small memory leak in ast simplify	Clifford Wolf	2014-08-21	1	-3/+3
*	Added support for DPI function with different names in C and Verilog	Clifford Wolf	2014-08-21	3	-9/+20
*	Added AstNode::asInt()	Clifford Wolf	2014-08-21	3	-2/+24
*	Fixed memory leak in DPI function calls	Clifford Wolf	2014-08-21	1	-0/+4
*	Added Verilog/AST support for DPI functions (dpi_call() still unimplemented)	Clifford Wolf	2014-08-21	8	-3/+135
*	Added support for global tasks and functions	Clifford Wolf	2014-08-21	3	-27/+49
*	Added "via_celltype" attribute on task/func	Clifford Wolf	2014-08-18	2	-18/+83
*	Added const folding of AST_CASE to AST simplifier	Clifford Wolf	2014-08-18	3	-1/+41
*	Improved AST ProcessGenerator performance	Clifford Wolf	2014-08-17	1	-3/+3
*	Use stackmap<> in AST ProcessGenerator	Clifford Wolf	2014-08-17	3	-24/+22
*	Added module->uniquify()	Clifford Wolf	2014-08-16	1	-6/+2
*	AST ProcessGenerator: replaced subst__{from,to} with subst__map	Clifford Wolf	2014-08-16	1	-41/+26
*	Renamed $_INV_ cell type to $_NOT_	Clifford Wolf	2014-08-15	2	-14/+14
*	Fixed bug in "read_verilog -ignore_redef"	Clifford Wolf	2014-08-15	1	-1/+1