aboutsummaryrefslogtreecommitdiffstats
path: root/frontends
Commit message (Expand)AuthorAgeFilesLines
* Fixed supply0/supply1 with many wiresClifford Wolf2014-12-111-3/+15
* Fixed minor bug in parsing delaysClifford Wolf2014-11-241-1/+4
* Fixed two minor bugs in constant parsingClifford Wolf2014-11-242-3/+7
* Added warning for use of 'z' constants in HDLClifford Wolf2014-11-143-6/+14
* Fixed parsing of nested verilog concatenation and replicateClifford Wolf2014-11-121-1/+1
* Added log_warning() APIClifford Wolf2014-11-094-17/+17
* Added "ENABLE_PLUGINS := 0" to verific amd64 build instructionsClifford Wolf2014-11-081-0/+1
* Fixed parsing of "module mymod #( parameter foo = 1, bar = 2 ..."Clifford Wolf2014-10-301-4/+5
* AST simplifier: optimize constant AST_CASE nodes before recursively descendingClifford Wolf2014-10-291-31/+35
* Added support for task and function args in parenthesesClifford Wolf2014-10-271-6/+45
* Improvements in $readmem[bh] implementationClifford Wolf2014-10-261-8/+13
* Added support for $readmemh/$readmembClifford Wolf2014-10-262-0/+113
* Fixed constant "cond ? string1 : string2" with strings of different sizeClifford Wolf2014-10-251-0/+2
* Re-introduced Yosys::readsome() helper functionClifford Wolf2014-10-233-15/+5
* minor indenting correctionsClifford Wolf2014-10-191-2/+2
* Builds on Mac 10.9.2 with LLVM 3.5.Parviz Palangpour2014-10-191-0/+5
* Fixed various VS warningsClifford Wolf2014-10-181-1/+1
* Header changes so it will compile on VSWilliam Speirs2014-10-172-4/+10
* Wrapped math in int constructorWilliam Speirs2014-10-171-1/+1
* Print "SystemVerilog" in "read_verilog -sv" log messagesClifford Wolf2014-10-161-1/+1
* Fixed handling of invalid array access in mem2reg codeClifford Wolf2014-10-162-3/+15
* Updated .gitignore file for ilang and verilog frontendsClifford Wolf2014-10-152-8/+8
* Replaced readsome() with read() and gcount()Clifford Wolf2014-10-151-3/+5
* Updated lexers & parsers to include prefixesWilliam Speirs2014-10-156-27/+35
* Added make_temp_{file,dir}() and remove_directory() APIsClifford Wolf2014-10-121-18/+8
* Added run_command() api to replace system() and popen()Clifford Wolf2014-10-121-15/+4
* Do not the 'z' modifier in format string (another win32 fix)Clifford Wolf2014-10-111-2/+2
* Fixed win32 troubles with f.readsome()Clifford Wolf2014-10-113-3/+3
* Disabled vhdl2verilog command for win32 buildsClifford Wolf2014-10-111-0/+5
* Added format __attribute__ to stringf()Clifford Wolf2014-10-101-1/+1
* Renamed SIZE() to GetSize() because of name collision on Win32Clifford Wolf2014-10-105-29/+29
* namespace YosysClifford Wolf2014-09-275-20/+29
* Another $clog2 bugfixClifford Wolf2014-09-081-0/+2
* Fixed $clog2 (off by one error)Clifford Wolf2014-09-061-2/+2
* Fixed assignment of out-of bounds array elementClifford Wolf2014-09-061-2/+26
* Corrected spelling mistakes found by lintianRuben Undheim2014-09-064-4/+4
* Removed $bu0 cell typeClifford Wolf2014-09-041-5/+5
* Removed compatbility.{h,cc}: Not using open_memstream/fmemopen anymoreClifford Wolf2014-08-231-4/+1
* Changed frontend-api from FILE to std::istreamClifford Wolf2014-08-2311-34/+46
* Added emscripten (emcc) support to build system and some build fixesClifford Wolf2014-08-222-1/+17
* Added support for non-standard <plugin>:<c_name> DPI syntaxClifford Wolf2014-08-221-0/+12
* Archibald Rust and Clifford Wolf: ffi-based dpi_call()Clifford Wolf2014-08-221-6/+90
* Fixed small memory leak in ast simplifyClifford Wolf2014-08-211-3/+3
* Added support for DPI function with different names in C and VerilogClifford Wolf2014-08-213-9/+20
* Added AstNode::asInt()Clifford Wolf2014-08-213-2/+24
* Fixed memory leak in DPI function callsClifford Wolf2014-08-211-0/+4
* Added Verilog/AST support for DPI functions (dpi_call() still unimplemented)Clifford Wolf2014-08-218-3/+135
* Added support for global tasks and functionsClifford Wolf2014-08-213-27/+49
* Added "via_celltype" attribute on task/funcClifford Wolf2014-08-182-18/+83
* Added const folding of AST_CASE to AST simplifierClifford Wolf2014-08-183-1/+41