aboutsummaryrefslogtreecommitdiffstats
path: root/frontends
Commit message (Expand)AuthorAgeFilesLines
* verific - make filepath handling compatible with verilog frontendMiodrag Milanovic2022-08-081-15/+29
* Merge pull request #3089 from YosysHQ/gatecat/liberty_wbMiodrag Milanović2022-08-011-0/+14
|\
| * Add read_liberty -wbgatecat2021-11-251-0/+14
* | Setting wire upto in verific importMiodrag Milanovic2022-07-291-2/+5
* | Update READMEMiodrag Milanović2022-07-281-1/+1
* | Upadte documentation and changelogMiodrag Milanovic2022-07-041-0/+1
* | Update to new verific extensions intefaceMiodrag Milanovic2022-06-301-3/+29
* | Add check for BLIF with no model nameArchie2022-06-221-1/+4
* | Revert "use new verific extensions library"Miodrag Milanovic2022-06-211-70/+54
* | use new verific extensions libraryMiodrag Milanovic2022-06-171-54/+70
* | removed deprecated features codeMiodrag Milanovic2022-06-131-235/+0
* | verific: Added "-vlog-libext" option to specify search extension for librariesMiodrag Milanovic2022-06-091-1/+16
* | verific: proper file location for readmem commandsMiodrag Milanovic2022-06-041-0/+33
* | verilog: fix width/sign detection for functionsZachary Snow2022-05-301-5/+7
* | verilog: fix size and signedness of array querying functionsJannis Harder2022-05-302-3/+2
* | verilog: fix $past's signednessJannis Harder2022-05-252-1/+2
* | verilog: fix signedness when removing unreachable casesJannis Harder2022-05-241-0/+1
* | fix text to fit 80 columnsMiodrag Milanovic2022-05-231-6/+9
* | Update verific command file documentationMiodrag Milanovic2022-05-231-17/+19
* | Use analysis mode if set in fileMiodrag Milanovic2022-05-231-2/+2
* | verific: Use new value change logic also for $stable of wide signals.Jannis Harder2022-05-111-7/+29
* | Merge pull request #3305 from jix/sva_value_change_logicJannis Harder2022-05-091-10/+25
|\ \
| * | verific: Improve logic generated for SVA value change expressionsJannis Harder2022-05-091-10/+25
* | | verific: Fix conditions of SVAs with explicit clocks within proceduresJannis Harder2022-05-033-5/+16
|/ /
* | Ignore merging past ffs that we are not properly mergingMiodrag Milanovic2022-04-291-0/+1
* | verific: allow memories to be inferred in loops (vhdl)Miodrag Milanovic2022-04-181-0/+1
* | verific: allow memories to be inferred in loopsN. Engelhardt2022-04-151-0/+1
* | sv: fix always_comb auto nosync for nested and function blocksZachary Snow2022-04-051-1/+11
* | Preserve internal wires for external netsMiodrag Milanovic2022-04-011-1/+1
* | Fix valgrind tests when using verificMiodrag Milanovic2022-03-301-0/+8
* | Properly mark modules importedMiodrag Milanovic2022-03-261-2/+2
* | Import verific netlist in consistent orderMiodrag Milanovic2022-03-252-23/+27
* | Merge pull request #3206 from YosysHQ/micko/quote_removeMiodrag Milanović2022-03-041-1/+4
|\ \
| * | Remove quotes if any from attributeMiodrag Milanovic2022-02-161-1/+4
* | | fix handling of escaped chars in json backend and frontendN. Engelhardt2022-02-181-3/+31
|/ /
* | verilog: support for time scale delay valuesZachary Snow2022-02-142-4/+16
* | Fix access to whole sub-structs (#3086)Kamil Rakoczy2022-02-142-6/+18
* | verilog: fix dynamic dynamic range asgn elabZachary Snow2022-02-111-17/+34
* | verilog: fix const func eval with upto variablesZachary Snow2022-02-112-3/+11
* | Merge pull request #3164 from zachjs/fix-ast-warnMiodrag Milanović2022-02-111-1/+1
|\ \
| * | fix dumpAst() compilation warningZachary Snow2022-01-181-1/+1
* | | Add ability to override verilog mode for verific -f commandMiodrag Milanovic2022-02-091-2/+44
* | | Use bmux for NTO1MUXMiodrag Milanovic2022-02-021-16/+2
|/ /
* | sv: auto add nosync to certain always_comb local varsZachary Snow2022-01-071-0/+127
* | sv: fix size cast internal expression extensionZachary Snow2022-01-071-2/+9
* | sv: fix size cast clipping expression widthZachary Snow2022-01-031-1/+2
* | fix width detection of array querying function in case and case item expressionsZachary Snow2021-12-172-2/+5
* | preprocessor: do not destroy double slash escaped identifiersThomas Sailer2021-12-151-0/+10
* | Add YOSYS to the implicitly defined verilog macros in verificClaire Xenia Wolf2021-12-131-1/+2
* | Merge pull request #3102 from YosysHQ/claire/enumxzMiodrag Milanović2021-12-101-1/+1
|\ \