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* Convert more log_error() to log_file_error() where possible.Henner Zeller2018-07-201-5/+3
* Fixed segfault on invalid verilog constant 1'b_Clifford Wolf2015-09-221-1/+1
* Small corrections to const2ast warning messagesClifford Wolf2015-08-171-2/+2
* Check base-n literals only contain valid digitsFlorian Zeitz2015-08-171-0/+3
* Warn on literals exceeding the specified bit widthFlorian Zeitz2015-08-171-34/+39
* Another block of spelling fixesLarry Doolittle2015-08-141-1/+1
* Fixed handling of [a-fxz?] in decimal constantsClifford Wolf2015-08-111-2/+7
* Fixed trailing whitespacesClifford Wolf2015-07-021-2/+2
* Fixed two minor bugs in constant parsingClifford Wolf2014-11-241-1/+5
* Added warning for use of 'z' constants in HDLClifford Wolf2014-11-141-1/+9
* Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespaceClifford Wolf2014-07-311-0/+4
* Using log_assert() instead of assert()Clifford Wolf2014-07-281-2/+1
* Improved parsing of large integer constantsClifford Wolf2014-06-151-11/+28
* Fixed handling of unsized constants in verilog frontendClifford Wolf2014-01-241-2/+2
* Major redesign of expr width/sign detecion (verilog/ast frontend)Clifford Wolf2013-07-091-1/+1
* Added SAT generator and simple sat_solve commandClifford Wolf2013-06-071-3/+2
* initial importClifford Wolf2013-01-051-0/+197