iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Added module->design and cell->module, wire->module pointers	Clifford Wolf	2014-07-31	1	-2/+2
*	Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace	Clifford Wolf	2014-07-31	1	-1/+7
*	Using log_assert() instead of assert()	Clifford Wolf	2014-07-28	1	-1/+0
*	Fixed verific bindings for new RTLIL api	Clifford Wolf	2014-07-27	2	-55/+42
*	Updated verific build/test instructions	Clifford Wolf	2014-07-25	2	-13/+11
*	Various fixes in Verific frontend for new RTLIL API	Clifford Wolf	2014-07-23	2	-27/+55
*	Fixed mapping of Verific WIDE_DFFRS operator	Clifford Wolf	2014-03-20	1	-2/+2
*	Fixed mapping of Verific FADD primitive with unconnected outputs	Clifford Wolf	2014-03-20	1	-4/+5
*	Progress in Verific bindings	Clifford Wolf	2014-03-17	1	-8/+51
*	Progress in Verific bindings	Clifford Wolf	2014-03-17	1	-5/+50
*	Progress in Verific bindings	Clifford Wolf	2014-03-17	1	-0/+2
*	Added support for memories to verific bindings	Clifford Wolf	2014-03-16	2	-1/+86
*	Use Verific Net::{IsGnd,IsPwr} API in Verific bindings	Clifford Wolf	2014-03-16	1	-27/+11
*	Progress in Verific bindings	Clifford Wolf	2014-03-15	1	-39/+16
*	Progress in Verific bindings	Clifford Wolf	2014-03-15	1	-7/+15
*	Progress in Verific bindings	Clifford Wolf	2014-03-15	1	-31/+31
*	Progress in Verific bindings	Clifford Wolf	2014-03-14	1	-13/+38
*	Progress in Verific bindings	Clifford Wolf	2014-03-14	1	-222/+338
*	Progress in Verific bindings	Clifford Wolf	2014-03-13	1	-10/+65
*	Copy Verific vdbs files to Yosys "share" data directory	Clifford Wolf	2014-03-13	2	-8/+23
*	Added test_navre.ys for verific frontend	Clifford Wolf	2014-03-13	1	-0/+17
*	Improved verific command (added support for some operators)	Clifford Wolf	2014-03-10	1	-2/+160
*	Improvements in verific command	Clifford Wolf	2014-03-10	1	-59/+39
*	Added "verific" command	Clifford Wolf	2014-03-09	2	-0/+489