iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	cxxrtl: don't overwrite buffered inputs.	whitequark	2020-12-11	2	-25/+33
*	cxxrtl: allow customizing the root module path in the C API.	whitequark	2020-12-03	2	-1/+20
*	Merge pull request #2468 from whitequark/cxxrtl-assert	whitequark	2020-12-02	2	-2/+16
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\| *	cxxrtl: use CXXRTL_ASSERT for RTL contract violations instead of assert.	whitequark	2020-12-02	2	-2/+16
* \|	Merge pull request #2469 from whitequark/cxxrtl-no-clk	whitequark	2020-12-02	1	-6/+14
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\| * \|	cxxrtl: fix crashes caused by a floating or constant clock input.	whitequark	2020-12-02	1	-6/+14
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* /	cxxrtl: provide a way to perform unobtrusive power-on reset.	whitequark	2020-12-02	4	-3/+78
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*	Add verilog backend option for simple_lhs	Miodrag Milanovic	2020-11-25	1	-6/+22
*	generate only simple assignments in verilog backend	Miodrag Milanovic	2020-11-25	1	-5/+9
*	Merge pull request #2295 from epfl-vlsc/firrtl_blackbox_generic_parameters	Miodrag Milanović	2020-11-24	1	-58/+294
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\| *	Formatting fixes	Sahand Kashani	2020-11-23	1	-10/+7
\| *	Add support for real-valued parameters + preserve type of parameters	Sahand Kashani	2020-08-06	1	-38/+113
\| *	Add firrtl backend support for generic parameters in blackbox components	Sahand Kashani	2020-07-23	1	-58/+222
* \|	backends/blif: Remove unused vector of strings (#2420)	William Woodruff	2020-11-16	1	-57/+53
* \|	cxxrtl: run `hierarchy -auto-top` if no top module is present.	whitequark	2020-11-02	1	-7/+26
* \|	cxxrtl: don't assert on non-constant $meminit inputs.	whitequark	2020-11-01	1	-2/+4
* \|	cxxrtl: don't assert on wires with multiple drivers.	whitequark	2020-11-01	1	-0/+2
* \|	btor: Use Mem helper.	Marcelina Kościelnicka	2020-10-21	1	-93/+102
* \|	smt2: Use Mem helper.	Marcelina Kościelnicka	2020-10-21	1	-186/+244
* \|	verilog_backend: Use Mem helper.	Marcelina Kościelnicka	2020-10-21	1	-274/+251
* \|	smtbmc: escape identifiers in verilog testbench	Jakob Wenzel	2020-10-06	1	-11/+29
* \|	write_verilog: emit intermediate wire for constant values in sensitivity list	N. Engelhardt	2020-09-28	1	-7/+53
* \|	Merge pull request #2372 from nakengelhardt/name_is_public	N. Engelhardt	2020-09-21	4	-8/+8
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\| * \|	use the new isPublic() in a few places	N. Engelhardt	2020-09-14	4	-8/+8
* \| \|	Merge pull request #2369 from Xiretza/gitignores	Miodrag Milanović	2020-09-10	2	-0/+2
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\| * \|	Add missing gitignores for test artifacts	Xiretza	2020-08-31	2	-0/+2
* \| \|	cxxrtl: expose driver kind in debug information.	whitequark	2020-09-02	3	-12/+112
* \| \|	cxxrtl: improve handling of FFs with async inputs (other than CLK).	whitequark	2020-09-02	1	-22/+23
* \| \|	cxxrtl: expose port direction in debug information.	whitequark	2020-09-02	3	-5/+51
* \| \|	cxxrtl: fix typo in comment. NFC.	whitequark	2020-09-02	1	-1/+1
* \| \|	cxxrtl: fix inaccuracy in CXXRTL_ALIAS documentation. NFC.	whitequark	2020-09-02	1	-1/+1
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* \|	write_smt2: fix SMT-LIB tutorial URL	whitequark	2020-08-29	1	-1/+1
* \|	Replace "ILANG" with "RTLIL" everywhere.	whitequark	2020-08-26	5	-34/+49
* \|	Ensure smt2 comments are associated with accessors	Noah Moroze	2020-08-20	1	-9/+20
* \|	Respect \A_SIGNED for $shift	Xiretza	2020-08-18	3	-17/+23
* \|	cxxrtl.h: Fix incorrect CarryOut in alu()	Andy Knowles	2020-08-12	1	-8/+3
* \|	cxxrtl.h: Fix incorrect CarryOut in alu when Bits % 32 != 0 && Invert == False	Andy Knowles	2020-08-12	1	-2/+8
* \|	verilog_backend: Add handling for all FF types.	Marcelina Kościelnicka	2020-07-30	1	-252/+134
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*	smtio: Emit `mode: start` options before `set-logic` command and any other op...	Alberto Gonzalez	2020-07-20	1	-1/+8
*	smtio: Add support for parsing `yosys-smt2-solver-option` info statements.	Alberto Gonzalez	2020-07-20	1	-3/+10
*	smt2: Add `-solver-option` option.	Alberto Gonzalez	2020-07-20	1	-0/+13
*	Only allow "sat" and "unsat" smt solver responses in yosys-smtbmc	Claire Wolf	2020-07-20	2	-4/+4
*	Merge pull request #2273 from whitequark/write-verilog-always-star-initial	clairexen	2020-07-16	1	-0/+5
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\| *	verilog_backend: in non-SV mode, add a trigger for `always @*`.	whitequark	2020-07-16	1	-0/+5
* \|	Merge pull request #2272 from whitequark/write-verilog-sv	clairexen	2020-07-16	1	-11/+18
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\| *	verilog_backend: add `-sv` option, make `-o <filename>.sv` work.	whitequark	2020-07-16	1	-11/+18
* \|	cxxrtl: fix typo. NFC.	whitequark	2020-07-14	1	-1/+1
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*	cxxrtl: expose eval() and commit() via the C API.	whitequark	2020-07-12	2	-0/+20
*	cxxrtl: add missing extern "C".	whitequark	2020-07-09	1	-0/+1
*	cxxrtl: update help text.	whitequark	2020-06-26	1	-2/+2