| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | xilinx: do not make DSP48E1 a whitebox for ABC9 by default (#2325) | Eddie Hung | 2020-09-23 | 3 | -17/+102 |
| | | | | | | | | | | | | * xilinx: eliminate SCCs from DSP48E1 model * xilinx: add SCC test for DSP48E1 * Update techlibs/xilinx/cells_sim.v * xilinx: Gate DSP48E1 being a whitebox behind ALLOW_WHITEBOX_DSP48E1 Have a test that checks it works through ABC9 when enabled | ||||
| * | Merge pull request #2384 from nakengelhardt/fix_2383 | Miodrag Milanović | 2020-09-23 | 1 | -1/+1 |
| |\ | | | | | switch argument order to work with macOS getopt | ||||
| | * | switch argument order to work with macOS getopt | N. Engelhardt | 2020-09-23 | 1 | -1/+1 |
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| * | Bump version | Yosys Bot | 2020-09-22 | 1 | -1/+1 |
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| * | Merge pull request #2372 from nakengelhardt/name_is_public | N. Engelhardt | 2020-09-21 | 14 | -25/+27 |
| |\ | | | | | add IdString::isPublic() | ||||
| | * | use the new isPublic() in a few places | N. Engelhardt | 2020-09-14 | 13 | -25/+25 |
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| | * | add IdString::isPublic() | N. Engelhardt | 2020-09-03 | 1 | -0/+2 |
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| * | | Bump version | Yosys Bot | 2020-09-19 | 1 | -1/+1 |
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| * | | Merge pull request #2381 from YosysHQ/unsupported | clairexen | 2020-09-18 | 1 | -2/+8 |
| |\ \ | | | | | | | Better error for unsupported SVA sequence | ||||
| | * | | Better error for unsupported SVA sequence | Miodrag Milanovic | 2020-09-18 | 1 | -2/+8 |
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| * | | Bump version | Yosys Bot | 2020-09-18 | 1 | -1/+1 |
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| * | | Merge pull request #2329 from antmicro/arrays-fix-multirange-size | clairexen | 2020-09-17 | 2 | -2/+27 |
| |\ \ | | | | | | | Rewrite multirange arrays sizes [n] as [n-1:0] | ||||
| | * | | Test multirange (unpacked) arrays size | Lukasz Dalek | 2020-08-03 | 1 | -0/+16 |
| | | | | | | | | | | | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com> | ||||
| | * | | Rewrite multirange arrays sizes [n] as [n-1:0] | Lukasz Dalek | 2020-08-03 | 1 | -2/+11 |
| | | | | | | | | | | | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com> | ||||
| * | | | Merge pull request #2330 from antmicro/arrays-fix-multirange-access | clairexen | 2020-09-17 | 2 | -1/+13 |
| |\ \ \ | | | | | | | | | Fix unsupported subarray access detection | ||||
| | * | | | Add test for subarray access on multidimensional arrays | Lukasz Dalek | 2020-08-03 | 1 | -0/+12 |
| | | | | | | | | | | | | | | | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com> | ||||
| | * | | | Fix subarray access condition | Lukasz Dalek | 2020-08-03 | 1 | -1/+1 |
| | |/ / | | | | | | | | | | Signed-off-by: Lukasz Dalek <ldalek@antmicro.com> | ||||
| * | | | Bump version | Yosys Bot | 2020-09-11 | 1 | -1/+1 |
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| * | | | Merge pull request #2369 from Xiretza/gitignores | Miodrag Milanović | 2020-09-10 | 3 | -2/+4 |
| |\ \ \ | | | | | | | | | Add missing gitignores for test artifacts | ||||
| | * | | | Add missing gitignores for test artifacts | Xiretza | 2020-08-31 | 3 | -2/+4 |
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| * | | | | Bump version | Yosys Bot | 2020-09-04 | 1 | -1/+1 |
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| * | | | Merge pull request #2371 from whitequark/cxxrtl-debug-info | whitequark | 2020-09-03 | 3 | -30/+177 |
| |\ \ \ | | | | | | | | | cxxrtl: expose port direction and driver kind in debug information | ||||
| | * | | | cxxrtl: expose driver kind in debug information. | whitequark | 2020-09-02 | 3 | -12/+112 |
| | | | | | | | | | | | | | | | | | | | | | | | | | This can be useful to determine whether the wire should be a part of a design checkpoint, whether it can be used to override design state, and whether driving it may cause a conflict. | ||||
| | * | | | cxxrtl: improve handling of FFs with async inputs (other than CLK). | whitequark | 2020-09-02 | 1 | -22/+23 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, the meaning of "sync def" included some flip-flop cells but not others. There was no actual reason for this; it was just poorly defined. After this commit, a "sync def" means that a wire holds design state because it is connected directly to a flip-flop output, and may never be unbuffered. This is not affected by presence of async inputs. | ||||
| | * | | | cxxrtl: expose port direction in debug information. | whitequark | 2020-09-02 | 3 | -5/+51 |
| | | | | | | | | | | | | | | | | | | | | | | | | | This can be useful to distinguish e.g. a combinatorially driven wire with type `CXXRTL_VALUE` from a module input with the same type, as well as general introspection. | ||||
| | * | | | cxxrtl: fix typo in comment. NFC. | whitequark | 2020-09-02 | 1 | -1/+1 |
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| | * | | | cxxrtl: fix inaccuracy in CXXRTL_ALIAS documentation. NFC. | whitequark | 2020-09-02 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | | | | | Nodes driven by a constant value have type CXXRTL_VALUE and their `next` pointer set to NULL. (This is already documented.) | ||||
| * | | | | Bump version | Yosys Bot | 2020-09-03 | 1 | -1/+1 |
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| * | | | Use latest verific | Miodrag Milanovic | 2020-09-02 | 1 | -1/+1 |
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| * | | | Bump version | Yosys Bot | 2020-09-02 | 1 | -1/+1 |
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| * | | | Merge pull request #2352 from zachjs/const-func-localparam | clairexen | 2020-09-01 | 2 | -3/+18 |
| |\ \ \ | | | | | | | | | Allow localparams in constant functions | ||||
| | * | | | Allow localparams in constant functions | Zachary Snow | 2020-08-20 | 2 | -3/+18 |
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| * | | | | Merge pull request #2366 from zachjs/library-format | clairexen | 2020-09-01 | 1 | -0/+11 |
| |\ \ \ \ | | | | | | | | | | | Simple support for %l format specifier | ||||
| | * | | | | Simple support for %l format specifier | Zachary Snow | 2020-08-29 | 1 | -0/+11 |
| | |/ / / | | | | | | | | | | | | | | | | | Yosys doesn't support libraries, so this provides the same behavior as %m, as some other tools have opted to do. | ||||
| * | | | | Merge pull request #2353 from zachjs/top-scope | clairexen | 2020-09-01 | 2 | -0/+23 |
| |\ \ \ \ | | | | | | | | | | | Module name scope support | ||||
| | * | | | | Module name scope support | Zachary Snow | 2020-08-20 | 2 | -0/+23 |
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| * | | | | Merge pull request #2365 from zachjs/const-arg-loop-split-type | clairexen | 2020-09-01 | 2 | -3/+24 |
| |\ \ \ \ | | | | | | | | | | | Fix constant args used with function ports split across declarations | ||||
| | * | | | | Fix constant args used with function ports split across declarations | Zachary Snow | 2020-08-29 | 2 | -3/+24 |
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| * | / / | Bump version | Yosys Bot | 2020-09-01 | 1 | -1/+1 |
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| * | | | Reorder to prevent crash | Miodrag Milanovic | 2020-08-31 | 1 | -3/+3 |
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| * | | | Merge pull request #2368 from YosysHQ/verific_portrange | clairexen | 2020-08-31 | 1 | -11/+20 |
| |\ \ \ | | | | | | | | | Fix import of VHDL enums | ||||
| | * | | | ast recognize lower case x and z and verific gives upper case | Miodrag Milanovic | 2020-08-30 | 1 | -2/+6 |
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| | * | | | Do not check for 1 and 0 only | Miodrag Milanovic | 2020-08-30 | 1 | -6/+0 |
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| | * | | | Fix import of VHDL enums | Miodrag Milanovic | 2020-08-30 | 1 | -11/+22 |
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| * | | | Bump version | Yosys Bot | 2020-08-30 | 1 | -1/+1 |
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| * | | | write_smt2: fix SMT-LIB tutorial URL | whitequark | 2020-08-29 | 1 | -1/+1 |
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| * | | | Bump version | Yosys Bot | 2020-08-29 | 1 | -1/+1 |
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| * | | | intel_alm: better map wide but shallow multiplies | Dan Ravensloft | 2020-08-28 | 1 | -2/+6 |
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| * | | | Bump version | Yosys Bot | 2020-08-28 | 1 | -1/+1 |
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| * | | | Merge pull request #2364 from whitequark/manual-typo | Miodrag Milanović | 2020-08-27 | 1 | -1/+1 |
| |\ \ \ | | | | | | | | | manual: fix typo | ||||
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