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* Updated ABC to hg rev 779de2de1481Clifford Wolf2015-04-251-1/+1
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* More iCE40 bram improvementsClifford Wolf2015-04-254-51/+69
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* Improved attributes API and handling of "src" attributesClifford Wolf2015-04-247-27/+119
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* iCE40 bram progressClifford Wolf2015-04-242-16/+35
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* iCE40 bram tests and fixesClifford Wolf2015-04-246-16/+181
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* Added ice40 bram supportClifford Wolf2015-04-244-1/+192
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* Fixed memory_share for unconditional write with part select to memoryClifford Wolf2015-04-221-0/+3
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* iCE40: Added SB_RAM40_4K{,NR,NW,NRNW}* modelsClifford Wolf2015-04-191-13/+289
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* Verilog front-end: define `BLACKBOX in -lib modeClifford Wolf2015-04-191-1/+2
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* added sync reset to ice40 test_ffs.shClifford Wolf2015-04-183-6/+20
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* Added ice40 test_arithClifford Wolf2015-04-182-0/+13
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* Added ice40 SB_CARRY supportClifford Wolf2015-04-183-2/+81
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* don't consider blackbox modules in "sat" commandClifford Wolf2015-04-181-7/+5
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* Improved handling of init values in opt_rmdffClifford Wolf2015-04-181-11/+9
| | | | based on a patch by Mingyu Gao, user gaomy3832 on github
* Bugfix for $_DFF_?_ in "dff2dffe -direct-match"Clifford Wolf2015-04-171-2/+2
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* Added mapping of synchronous set/reset to iCE40 flowClifford Wolf2015-04-173-4/+130
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* Improved "maccmap" help messageClifford Wolf2015-04-161-2/+2
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* A "#" does start a comment, not a label.Clifford Wolf2015-04-161-0/+3
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* Changed ice40 ICESTORM_CARRYCONST port nameClifford Wolf2015-04-161-2/+2
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* Fixed "dff2dffe -direct-match"Clifford Wolf2015-04-162-12/+25
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* Added simple ice40 dff testsClifford Wolf2015-04-163-0/+49
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* improved ice40 dff cell mappingClifford Wolf2015-04-163-7/+46
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* Added "dff2dffe -direct-match"Clifford Wolf2015-04-161-14/+35
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* use "hierarchy -auto-top" in synth_ice40Clifford Wolf2015-04-141-3/+3
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* more cells in ice40 cell libraryClifford Wolf2015-04-141-8/+289
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* Added "splice -wires"Clifford Wolf2015-04-131-9/+20
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* Added handling of bool-output cells to "wreduce"Clifford Wolf2015-04-131-0/+11
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* Improved xilinx "bram1" testClifford Wolf2015-04-091-1/+2
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* Added memory_bram "make_outreg" featureClifford Wolf2015-04-092-2/+27
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* Added back-end auto-detect for .edif and .jsonClifford Wolf2015-04-091-0/+4
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* Minor fixes in handling of "init" attributeClifford Wolf2015-04-092-7/+12
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* Xilinx DRAMS: RAM64X1D, RAM128X1DClifford Wolf2015-04-093-13/+67
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* Fixed const2big performance bugClifford Wolf2015-04-091-14/+21
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* techmap code cleanupClifford Wolf2015-04-091-10/+6
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* Towards DRAM support in Xilinx flowClifford Wolf2015-04-095-0/+78
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* Added support for "file names with blanks"Clifford Wolf2015-04-087-33/+43
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* Removed "techmap -share_map" (use "-map +/filename" instead)Clifford Wolf2015-04-082-10/+1
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* Added %M and %C select operatorsClifford Wolf2015-04-071-1/+38
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* Added "pmuxtree" commandClifford Wolf2015-04-073-0/+164
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* Added "chparam -list"Clifford Wolf2015-04-071-0/+21
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* Added decoder generation to "muxcover"Clifford Wolf2015-04-071-13/+104
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* Added hashlib support for std::tuple<>Clifford Wolf2015-04-071-0/+15
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* Added "muxcover" commandClifford Wolf2015-04-072-0/+542
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* Added pool<K>::pop()Clifford Wolf2015-04-071-0/+8
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* typo fixClifford Wolf2015-04-071-1/+1
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* Added "chparam" commandClifford Wolf2015-04-071-0/+57
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* Added support for initialized xilinx bramsClifford Wolf2015-04-0611-92/+315
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* Added support for initialized bramsClifford Wolf2015-04-062-9/+45
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* Added Xilinx test case for initialized bramsClifford Wolf2015-04-064-0/+80
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* Added Xilinx bram black-box modulesClifford Wolf2015-04-063-0/+322
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