Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Merge pull request #1041 from YosysHQ/clifford/fix1040 | Clifford Wolf | 2019-05-25 | 1 | -6/+20 |
|\ | | | | | Fix handling of offset and upto module ports in write_blif | ||||
| * | Fix handling of offset and upto module ports in write_blif, fixes #1040 | Clifford Wolf | 2019-05-25 | 1 | -6/+20 |
|/ | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Add proper error message for btor recursion_guard | Clifford Wolf | 2019-05-24 | 1 | -1/+7 |
| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Merge pull request #1036 from YosysHQ/eddie/xilinx_dram | Eddie Hung | 2019-05-23 | 1 | -0/+4 |
|\ | | | | | Add "min bits" and "min wports" to xilinx dram rules | ||||
| * | Add "min bits" and "min wports" to xilinx dram rules | Eddie Hung | 2019-05-23 | 1 | -0/+4 |
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* | Merge pull request #1031 from mdaiter/optimizeLookupTableBtor | Clifford Wolf | 2019-05-23 | 1 | -6/+4 |
|\ | | | | | Optimize numberOfPermutations | ||||
| * | Optimize numberOfPermutations | Matthew Daiter | 2019-05-22 | 1 | -6/+4 |
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* | | Merge pull request #1019 from YosysHQ/clifford/fix1016 | Clifford Wolf | 2019-05-22 | 2 | -3/+13 |
|\ \ | | | | | | | Add "wreduce -keepdc" | ||||
| * | | Add "wreduce -keepdc", fixes #1016 | Clifford Wolf | 2019-05-20 | 2 | -3/+13 |
| | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | | Merge pull request #1021 from ucb-bar/fixfirrtl_shr,neg | Clifford Wolf | 2019-05-22 | 1 | -3/+7 |
|\ \ \ | |_|/ |/| | | Fix static shift operands, neg result type, minor formatting | ||||
| * | | Fix static shift operands, neg result type, minor formatting | Jim Lawson | 2019-05-21 | 1 | -3/+7 |
| | | | | | | | | | | | | | | | | | | Static shift operands must be constants. The result of FIRRTL's neg operator is signed. Fix poor indentation for gen_read(). | ||||
| * | | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2019-05-21 | 66 | -629/+2298 |
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| * | | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2019-05-02 | 5 | -60/+66 |
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| * \ \ | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2019-05-01 | 6 | -5/+68 |
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| * \ \ \ | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2019-04-30 | 91 | -445/+5146 |
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| * \ \ \ \ | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2019-04-09 | 8 | -7/+76 |
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| * \ \ \ \ \ | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2019-04-03 | 3 | -30/+203 |
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| * \ \ \ \ \ \ | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2019-04-01 | 120 | -600/+5502 |
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| * \ \ \ \ \ \ \ | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2019-03-04 | 12 | -28/+124 |
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| * \ \ \ \ \ \ \ \ | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2019-03-01 | 31 | -105/+622 |
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| * \ \ \ \ \ \ \ \ \ | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2019-02-25 | 39 | -222/+2479 |
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| * \ \ \ \ \ \ \ \ \ \ | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2019-02-15 | 3 | -44/+47 |
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| * \ \ \ \ \ \ \ \ \ \ \ | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2019-02-11 | 109 | -413/+3479 |
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| * | | | | | | | | | | | | | Fix botched merge in CHANGELOG | Jim Lawson | 2018-12-18 | 1 | -1/+0 |
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| * | | | | | | | | | | | | | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2018-12-18 | 128 | -636/+8336 |
| |\ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | # Conflicts: # CHANGELOG # frontends/verific/verific.cc # frontends/verilog/verilog_parser.y | ||||
| * | | | | | | | | | | | | | | Improve Verific importer blackbox handling | Clifford Wolf | 2018-10-08 | 1 | -2/+14 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | | | | | | | | | | | Add "write_edif -attrprop" | Clifford Wolf | 2018-10-08 | 1 | -11/+28 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | | | | | | | | | | | Fix compiler warning in verific.cc | Clifford Wolf | 2018-10-08 | 1 | -0/+2 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | | | | | | | | | | | Fix misspelling in issue_template.md | Tim Ansell | 2018-10-08 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's been bugging me :-P | ||||
| * | | | | | | | | | | | | | | Fix IdString M in setup_stdcells() | Adrian Wheeldon | 2018-10-08 | 1 | -1/+1 |
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| * | | | | | | | | | | | | | | Add inout ports to cells_xtra.v | Clifford Wolf | 2018-10-08 | 2 | -2/+14 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | | | | | | | | | | | xilinx: Adding missing inout IO port to IOBUF | Tim Ansell | 2018-10-08 | 1 | -0/+1 |
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| * | | | | | | | | | | | | | | Fix for issue 594. | Tom Verbeure | 2018-10-08 | 1 | -1/+2 |
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| * | | | | | | | | | | | | | | Add read_verilog $changed support | Dan Gisselquist | 2018-10-08 | 1 | -1/+4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | | | | | | | | | | | ecp5: Don't map ROMs to DRAM | David Shah | 2018-10-08 | 1 | -0/+1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
| * | | | | | | | | | | | | | | Fix handling of $past 2nd argument in read_verilog | Clifford Wolf | 2018-10-08 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | | | | | | | | | | | Update to v2 YosysVS template | Clifford Wolf | 2018-10-08 | 1 | -4/+4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | | | | | | | | | | | Add "read_verilog -noassert -noassume -assert-assumes" | Clifford Wolf | 2018-10-08 | 3 | -6/+49 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | | | | | | | | | | | Added support for ommited "parameter" in Verilog-2001 style parameter decl ↵ | Clifford Wolf | 2018-10-08 | 1 | -3/+9 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | in SV mode Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | | | | | | | | | | | Update CHANGELOG | Clifford Wolf | 2018-10-08 | 1 | -2/+35 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | | | | | | | | | | | added prefix to FDirection constants, fixing windows build | Miodrag Milanovic | 2018-10-08 | 1 | -11/+11 |
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| * | | | | | | | | | | | | | | Update CHANGLELOG | Clifford Wolf | 2018-10-08 | 1 | -5/+27 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | | | | | | | | | | | Update Changelog | Clifford Wolf | 2018-10-08 | 1 | -1/+54 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | | | | | | | | | | | | Fix Cygwin build and document needed packages | Miodrag Milanovic | 2018-10-08 | 3 | -1/+14 |
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| * | | | | | | | | | | | | | | Fixed typo in "verilog_write" help message | acw1251 | 2018-10-08 | 2 | -5/+5 |
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| * | | | | | | | | | | | | | | Merge remote-tracking branch 'upstream/master' | Jim Lawson | 2018-09-17 | 11 | -14/+78 |
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ | Merge pull request #4 from YosysHQ/master | Jim Lawson | 2018-08-28 | 3 | -23/+112 |
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | merge with YosysHQ master | ||||
* | \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | Merge pull request #1024 from YosysHQ/eddie/fix_Wmissing_braces | Eddie Hung | 2019-05-21 | 1 | -5/+9 |
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| * | | | | | | | | | | | | | | | | Rename label | Eddie Hung | 2019-05-21 | 1 | -6/+5 |
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| * | | | | | | | | | | | | | | | | Try again | Eddie Hung | 2019-05-21 | 1 | -4/+10 |
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