iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Moved stand-alone libs to libs/ directory and added libs/subcircuit	Clifford Wolf	2013-02-27	39	-9/+2776
*	Added support for verilog genblock[index].member syntax	Clifford Wolf	2013-02-26	4	-11/+33
*	Merge pull request #2 from mschmoelzer/master	Clifford Wolf	2013-02-24	1	-4/+4
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\| *	"fsm_export" pass: fix KISS file generation.	Martin Schmölzer	2013-02-23	1	-4/+4
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*	Added support for "always @(*)"	Clifford Wolf	2013-01-16	2	-1/+4
*	Merge pull request #1 from mschmoelzer/master	Clifford Wolf	2013-01-08	1	-46/+86
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\| *	Merge remote-tracking branch 'upstream/master'	Martin Schmölzer	2013-01-08	4	-40/+219
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* \|	Added "getting started" section to README	Clifford Wolf	2013-01-06	1	-2/+105
* \|	Improvements in command shell	Clifford Wolf	2013-01-06	3	-38/+114
\| *	Add support for "fsm_export" synthesis attributes to fsm_export pass.	Martin Schmölzer	2013-01-08	1	-46/+86
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*	Added a:= syntax to select framework	Clifford Wolf	2013-01-05	1	-0/+47
*	Added qtcreator.creator.user to top level .gitignore	Clifford Wolf	2013-01-05	1	-2/+3
*	Copy attributes from state signal to fsm cell	Clifford Wolf	2013-01-05	1	-0/+1
*	More .gitignore and fixed "make mrproper"	Clifford Wolf	2013-01-05	2	-1/+5
*	added more .gitignore files (make test)	Clifford Wolf	2013-01-05	4	-0/+7
*	added .gitignore files	Clifford Wolf	2013-01-05	5	-0/+14
*	initial import	Clifford Wolf	2013-01-05	481	-0/+54634