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* Yosys 0.7Clifford Wolf2016-11-031-1/+1
* Bugfix in "hierarchy -check"Clifford Wolf2016-11-021-1/+1
* Updated command reference in manualClifford Wolf2016-11-021-100/+568
* Changelog for Yosys 0.7Clifford Wolf2016-11-021-0/+99
* Added support for fsm_encoding="user"Clifford Wolf2016-11-021-3/+3
* Added "fsm_expand -full"Clifford Wolf2016-11-022-17/+35
* Some fixes in handling of signed arraysClifford Wolf2016-11-012-0/+7
* iCE40 flow is not experimental anymoreClifford Wolf2016-11-011-1/+1
* Added initial version of "synth_gowin"Clifford Wolf2016-11-014-0/+266
* Adde "write_verilog -renameprefix -v"Clifford Wolf2016-11-011-5/+23
* Added support for (single-clock) transparent memories to bram testsClifford Wolf2016-11-012-10/+23
* Bugfix in fsm_map for FSMs without reset stateClifford Wolf2016-10-251-1/+2
* Added avail params to ilang format, check module params in 'hierarchy -check'Clifford Wolf2016-10-224-3/+25
* Added "setparam -type"Clifford Wolf2016-10-191-3/+13
* No limit for length of lines in BLIF front-endClifford Wolf2016-10-191-1/+7
* Merge pull request #250 from azonenberg/masterClifford Wolf2016-10-191-4/+35
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| * Fixed typo in last commitAndrew Zonenberg2016-10-181-1/+1
| * greenpak4: Added GP_PGEN cell definitionAndrew Zonenberg2016-10-181-0/+21
| * Added GLITCH_FILTER parameter to GP_DELAYAndrew Zonenberg2016-10-181-3/+2
| * greenpak4: added model for GP_EDGEDET blockAndrew Zonenberg2016-10-181-0/+10
| * Merge https://github.com/cliffordwolf/yosysAndrew Zonenberg2016-10-184-8/+98
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* | Ignore L_pi nets in "yosys-smtbmc --cex"Clifford Wolf2016-10-181-2/+5
* | Use init value "2" for all uninitialized FFs in BLIF back-endClifford Wolf2016-10-181-4/+1
* | Added "yosys-smtbmc --cex <filename>"Clifford Wolf2016-10-171-1/+35
* | Bugfix in "miter -assert" handling of assumptionsClifford Wolf2016-10-171-2/+2
* | Added clk2fflogic support for $dffsr and $dlatchClifford Wolf2016-10-171-1/+57
| * greenpak4: Changed parameters for GP_SYSRESETAndrew Zonenberg2016-10-161-1/+2
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* Improvements and bugfixes in clk2fflogicClifford Wolf2016-10-161-13/+21
* cleanup in write_smt2 log messages (-bv and -mem are now default)Clifford Wolf2016-10-161-1/+1
* Build fixes for VS 2015Clifford Wolf2016-10-162-1/+4
* Some minor build fixes for Visual CClifford Wolf2016-10-143-3/+16
* Avoid using strcasecmp()Clifford Wolf2016-10-141-2/+21
* Fixed version string for out-of-tree buildsClifford Wolf2016-10-141-1/+1
* Added notes about some formal features to READMEClifford Wolf2016-10-141-2/+23
* Added $anyseq cell typeClifford Wolf2016-10-1411-11/+40
* Added clk2fflogicClifford Wolf2016-10-142-0/+154
* Added opt_rmdff support for $ff cellsClifford Wolf2016-10-141-5/+13
* Added $global_clock verilog syntax support for creating $ff cellsClifford Wolf2016-10-148-15/+64
* Added MEMID handling to "flatten" passClifford Wolf2016-10-141-0/+6
* Merge branch 'master' of github.com:cliffordwolf/yosysClifford Wolf2016-10-141-1/+1
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| * Merge pull request #246 from set-soft/abc_external_ovrClifford Wolf2016-10-141-1/+1
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| | * Ugh! extra patches got here, revertingSalvador E. Tropea2016-10-131-4/+3
| | * Allow to overwrite ABCEXTERNAL from the environment.Salvador E. Tropea2016-10-131-1/+1
| | * Modified test target name (to test-all)Salvador E. Tropea2016-10-131-2/+2
| | * Added a new configuration variable GIT_REV_WHERESalvador E. Tropea2016-10-131-1/+2
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* / Added YOSYS_VER_STR make variableClifford Wolf2016-10-141-2/+4
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* Added "zinit" passClifford Wolf2016-10-122-0/+152
* Added $ff and $_FF_ cell typesClifford Wolf2016-10-1212-19/+118
* Fixed "make test" for git head of iverilogClifford Wolf2016-10-111-1/+1
* define PATH_MAX if not defined by limits.hClifford Wolf2016-10-111-0/+5
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