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* write_xaiger: make more robust, update docEddie Hung2020-01-061-29/+14
* write_aiger: make more robustEddie Hung2020-01-061-0/+8
* Add abc9.dff scratchpad optionEddie Hung2020-01-061-0/+1
* Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2020-01-062-191/+281
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| * Merge pull request #1582 from nakengelhardt/abc_scratchpad_scriptEddie Hung2020-01-062-191/+281
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| | * check scratchpad for arguments in abc pass tooN. Engelhardt2020-01-061-157/+214
| | * inherit default values when checking scratchpad for argumentsN. Engelhardt2020-01-061-27/+10
| | * share codepath for scratchpad argument handling with command argumentsN. Engelhardt2020-01-031-40/+84
| | * Merge branch 'master' of https://github.com/YosysHQ/yosys into abc_scratchpad...N. Engelhardt2020-01-03122-694/+4372
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| | * | check scratchpad variable abc9.scriptfileN. Engelhardt2019-12-171-0/+2
| | * | check scratchpad variables for custom abc scriptsN. Engelhardt2019-12-132-0/+4
* | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2020-01-0619-40/+69
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| * | | Merge pull request #1611 from YosysHQ/mmicko/wrapcarry_fixMiodrag Milanović2020-01-051-0/+2
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| | * | Valid to have attribute starting with SB_CARRY.Miodrag Milanovic2020-01-041-0/+2
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| * | Merge pull request #1604 from whitequark/unify-ram-namingwhitequark2020-01-0218-40/+67
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| | * | Harmonize BRAM/LUTRAM descriptions across all of Yosys.whitequark2020-01-0118-40/+67
* | | | Reword (* abc9_flop *) descriptionEddie Hung2020-01-061-2/+3
* | | | Restore write_xaiger's holes_mode since port_id order causes QoREddie Hung2020-01-031-27/+19
* | | | CleanupEddie Hung2020-01-021-2/+1
* | | | Fix spacingEddie Hung2020-01-021-1/+1
* | | | write_xaiger: get rid of external_bits dictEddie Hung2020-01-021-1/+1
* | | | Combine tests to check multiple clock domainsEddie Hung2020-01-021-33/+10
* | | | synth_xilinx -dff to work with abc tooEddie Hung2020-01-021-6/+14
* | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2020-01-0227-92/+160
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| * | | Merge pull request #1609 from YosysHQ/clifford/fix1596Clifford Wolf2020-01-021-4/+25
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| | * | | Always create $shl, $shr, $sshl, $sshr cells with unsigned B inputsClifford Wolf2020-01-021-4/+25
| * | | | Merge pull request #1601 from YosysHQ/eddie/synth_retimeEddie Hung2020-01-0213-48/+52
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| | * | | | Update doc that "-retime" calls abc with "-dff -D 1"Eddie Hung2019-12-3011-12/+12
| | * | | | Disable synth_gowin -abc9 as it offers no advantages yetEddie Hung2019-12-301-12/+12
| | * | | | Revert "Revert "synth_* with -retime option now calls abc with -D 1 as well""Eddie Hung2019-12-3011-13/+13
| | * | | | Revert "ABC to call retime all the time"Eddie Hung2019-12-301-11/+15
| * | | | | Merge pull request #1608 from YosysHQ/eddie/ifndef_YOSYSEddie Hung2020-01-021-6/+6
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| | * | | | ifdef __ICARUS__ -> ifndef YOSYSEddie Hung2020-01-011-6/+6
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| * | | | Merge pull request #1606 from YosysHQ/eddie/improve_testsEddie Hung2020-01-0110-19/+20
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| | * | | | Revert insertion of 'reg', leave note behindEddie Hung2020-01-011-1/+2
| | * | | | Fix anlogic async flop mappingEddie Hung2020-01-011-8/+8
| | * | | | Do not do call equiv_opt when no sim model existsEddie Hung2019-12-312-4/+4
| | * | | | Fix warningsEddie Hung2019-12-312-2/+2
| | * | | | Call equiv_opt with -multiclock and -assertEddie Hung2019-12-315-5/+5
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| * | | | Merge pull request #1605 from YosysHQ/iopad_fixMiodrag Milanović2020-01-012-0/+22
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| | * | | Added a test caseMiodrag Milanovic2020-01-011-0/+19
| | * | | take skip wire bits into accountMiodrag Milanovic2020-01-011-0/+3
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| * | | GrammarEddie Hung2019-12-301-1/+1
| * | | Update timings for Xilinx S7 cellsEddie Hung2019-12-301-15/+35
* | | | Add 'abc9 -dff' to CHANGELOGEddie Hung2020-01-021-0/+1
* | | | Update docEddie Hung2020-01-021-4/+4
* | | | Update commentsEddie Hung2020-01-021-11/+6
* | | | abc9 -keepff -> -dff; refactor dff operationsEddie Hung2020-01-024-166/+135
* | | | Clamp -46ps for FDPE* tooEddie Hung2020-01-011-2/+2
* | | | Get rid of (* abc9_keep *) in write_xaiger tooEddie Hung2020-01-011-15/+18