iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	subcircuit library: implied allExtern for mining	Clifford Wolf	2013-03-02	3	-7/+9
\|
*	Added frequent subcircuit miner to subcircuit library	Clifford Wolf	2013-03-02	7	-13/+368
\|
*	Added help messages for fsm_* passes	Clifford Wolf	2013-03-01	10	-42/+194
\|
*	Added help messages to memory_* passes	Clifford Wolf	2013-03-01	4	-15/+71
\|
*	Added help messages to proc_* passes	Clifford Wolf	2013-03-01	6	-27/+110
\|
*	Added help messages for opt_* passes	Clifford Wolf	2013-03-01	7	-11/+127
\|
*	Added id2cstr API	Clifford Wolf	2013-03-01	3	-10/+17
\|
*	Added help messages to ilang and verilog frontends	Clifford Wolf	2013-03-01	3	-2/+60
\|
*	Do not unescape identifiers starting with \$	Clifford Wolf	2013-03-01	1	-1/+1
\|
*	Fixed "make qtcreator" (we now have a libs/ directory)	Clifford Wolf	2013-03-01	1	-2/+2
\|
*	Added more help messages	Clifford Wolf	2013-03-01	9	-11/+121
\|
*	Improved help message for "shell" command	Clifford Wolf	2013-02-28	1	-0/+30
\|
*	Added help command to README (and some other README changes)	Clifford Wolf	2013-02-28	1	-12/+14
\|
*	Added online help for "show" and "hierarchy" commands	Clifford Wolf	2013-02-28	2	-4/+41
\|
*	Added help for command line options	Clifford Wolf	2013-02-28	3	-7/+69
\|
*	Added help msg to select command (and minor improvements)	Clifford Wolf	2013-02-28	1	-7/+146
\|
*	Added more help messages (extract, abc, dfflibmap)	Clifford Wolf	2013-02-28	4	-16/+108
\|
*	Added "help" command	Clifford Wolf	2013-02-28	2	-8/+50
\|
*	Added port swapping and compatible types to "extract" pass	Clifford Wolf	2013-02-28	1	-24/+80
\|
*	Added "extract -constports" feature	Clifford Wolf	2013-02-27	1	-5/+35
\|
*	Changed default frontend for "-" to "script" (was: "ilang")	Clifford Wolf	2013-02-27	1	-4/+7
\|
*	Fixed "extract" pass for non-optimized needles	Clifford Wolf	2013-02-27	1	-5/+4
\|
*	Added support for simple gates with one constant input to opt_const	Clifford Wolf	2013-02-27	1	-0/+6
\|
*	Added extract -verbose and -map ilang support	Clifford Wolf	2013-02-27	1	-5/+15
\|
*	Implemented basic functionality of "extract" pass	Clifford Wolf	2013-02-27	3	-15/+87
\|
*	Added support for constant signals in "extract" pass	Clifford Wolf	2013-02-27	1	-7/+18
\|
*	Added "extract" pass (not functional yet)	Clifford Wolf	2013-02-27	2	-0/+211
\|
*	Added some additional TODO items	Clifford Wolf	2013-02-27	1	-2/+6
\|
*	Fixed typo in README	Clifford Wolf	2013-02-27	1	-1/+1
\|
*	Added copyright statement to readme file	Clifford Wolf	2013-02-27	1	-0/+21
\|
*	Moved stand-alone libs to libs/ directory and added libs/subcircuit	Clifford Wolf	2013-02-27	39	-9/+2776
\|
*	Added support for verilog genblock[index].member syntax	Clifford Wolf	2013-02-26	4	-11/+33
\|
*	Merge pull request #2 from mschmoelzer/master	Clifford Wolf	2013-02-24	1	-4/+4
\|\ \| \| \| \|	"fsm_export" pass: fix KISS file generation.
\| *	"fsm_export" pass: fix KISS file generation.	Martin Schmölzer	2013-02-23	1	-4/+4
\|/ \| \| \| \| \| \| \| \| \| \|	The KISS file format now follows the conventions specified in "Logic Synthesis and Optimization Benchmarks User Guide", Version 3.0 by Saeyang Yang. This change ensures interoperability with the "trfsmgen" program by Johann Glaser. Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
*	Added support for "always @(*)"	Clifford Wolf	2013-01-16	2	-1/+4
\|
*	Merge pull request #1 from mschmoelzer/master	Clifford Wolf	2013-01-08	1	-46/+86
\|\ \| \| \| \|	Add support for "fsm_export" synthesis attributes to fsm_export pass
\| *	Merge remote-tracking branch 'upstream/master'	Martin Schmölzer	2013-01-08	4	-40/+219
\| \|\ \| \|/ \|/\|
* \|	Added "getting started" section to README	Clifford Wolf	2013-01-06	1	-2/+105
\| \|
* \|	Improvements in command shell	Clifford Wolf	2013-01-06	3	-38/+114
\| \| \| \| \| \| \| \| \| \| \| \|	- Added 'shell' command (run interactive shell from synth script) - Added support for ; as cmd seperator as in "proc; opt" - Fixed c++ static initialization order problem with pass register
\| *	Add support for "fsm_export" synthesis attributes to fsm_export pass.	Martin Schmölzer	2013-01-08	1	-46/+86
\|/ \| \| \| \| \| \| \| \| \| \| \| \| \|	This allows to specify the file name for exported files directly in the HDL source via the fsm_export=... attribute on the FSM state register. Verilog example: (* fsm_export="my_fsm.kiss2" *) reg [3:0] state; The fsm_export pass now also accepts the option "-noauto". This causes only FSMs with the fsm_export attribute to be exported, any other FSMs are ignored. Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
*	Added a:= syntax to select framework	Clifford Wolf	2013-01-05	1	-0/+47
\|
*	Added qtcreator.creator.user to top level .gitignore	Clifford Wolf	2013-01-05	1	-2/+3
\|
*	Copy attributes from state signal to fsm cell	Clifford Wolf	2013-01-05	1	-0/+1
\|
*	More .gitignore and fixed "make mrproper"	Clifford Wolf	2013-01-05	2	-1/+5
\|
*	added more .gitignore files (make test)	Clifford Wolf	2013-01-05	4	-0/+7
\|
*	added .gitignore files	Clifford Wolf	2013-01-05	5	-0/+14
\|
*	initial import	Clifford Wolf	2013-01-05	481	-0/+54634