Commit message (Collapse) | Author | Age | Files | Lines | |
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* | minor change in script | Ahmed Irfan | 2014-01-24 | 1 | -2/+11 |
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* | Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor | Ahmed Irfan | 2014-01-22 | 3 | -6/+13 |
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| * | Fixed algorithmic complexity of AST simplification of long expressions | Clifford Wolf | 2014-01-20 | 3 | -6/+13 |
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* | | slice bug corrected | Ahmed Irfan | 2014-01-20 | 1 | -1/+1 |
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* | | assert feature | Ahmed Irfan | 2014-01-20 | 1 | -9/+40 |
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* | | Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor | Ahmed Irfan | 2014-01-20 | 16 | -33/+349 |
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| * | Added hilomap command | Clifford Wolf | 2014-01-19 | 2 | -0/+130 |
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| * | Added sat -tempinduc and sat -prove-asserts | Clifford Wolf | 2014-01-19 | 1 | -10/+41 |
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| * | Added $assert support to satgen | Clifford Wolf | 2014-01-19 | 1 | -0/+21 |
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| * | Added $assert cell | Clifford Wolf | 2014-01-19 | 7 | -1/+120 |
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| * | Added Verilog parser support for asserts | Clifford Wolf | 2014-01-19 | 4 | -3/+12 |
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| * | Fixed $lut simlib model for a wider range of tools | Clifford Wolf | 2014-01-18 | 1 | -10/+12 |
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| * | Fixed parsing of verilog macros at end of line | Clifford Wolf | 2014-01-18 | 1 | -1/+1 |
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| * | More changes to simlib to make it friendlier to a wider range of tools | Clifford Wolf | 2014-01-18 | 1 | -10/+14 |
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| * | Fixed a type in $mem model in simlib.v | Clifford Wolf | 2014-01-18 | 1 | -1/+1 |
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* | | script added | Ahmed Irfan | 2014-01-18 | 2 | -9/+28 |
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* | | Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor | Ahmed Irfan | 2014-01-18 | 0 | -0/+0 |
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| * \ | Merge branch 'master' of https://github.com/ahmedirfan1983/yosys | Ahmed Irfan | 2014-01-18 | 0 | -0/+0 |
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| * \ \ | Merge branch 'master' of https://github.com/cliffordwolf/yosys | Ahmed Irfan | 2014-01-18 | 13 | -12/+451 |
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* | | | | pmux2mux | Ahmed Irfan | 2014-01-18 | 7 | -9/+197 |
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| * | | | Removed cases of trailing comma in stdcells.v | Clifford Wolf | 2014-01-18 | 1 | -3/+3 |
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| * | | | Added $bu0 cell to simlib.v | Clifford Wolf | 2014-01-18 | 1 | -0/+22 |
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| * | | | Improved setundef random number generator | Clifford Wolf | 2014-01-18 | 1 | -1/+1 |
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| * | | | Added setundef command | Clifford Wolf | 2014-01-17 | 2 | -0/+158 |
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| * | | | Some improvements in log_dump_val_worker() templates | Clifford Wolf | 2014-01-17 | 1 | -1/+6 |
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| * | | | Added techlibs/common/pmux2mux.v | Clifford Wolf | 2014-01-17 | 2 | -1/+26 |
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* | | | | verilog default options pull | Ahmed Irfan | 2014-01-17 | 2 | -34/+104 |
| | | | | | | | | | | | | | | | | shift operator width issues | ||||
* | | | | Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor | Ahmed Irfan | 2014-01-17 | 4 | -7/+119 |
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| * | | | Merge pull request #4 from cliffordwolf/master | Ahmed Irfan | 2014-01-17 | 4 | -7/+119 |
| |\| | | | | | | | | | | verilog defaults | ||||
| | * | | Added verilog_defaults command | Clifford Wolf | 2014-01-17 | 1 | -0/+66 |
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| | * | | Added support for $adff with undef data inputs to opt_rmdff | Clifford Wolf | 2014-01-17 | 1 | -0/+6 |
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| | * | | Added select -assert-none and -assert-any | Clifford Wolf | 2014-01-17 | 2 | -7/+47 |
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* | | | | Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor | Ahmed Irfan | 2014-01-17 | 2 | -0/+117 |
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| * | | | Merge pull request #3 from cliffordwolf/master | Ahmed Irfan | 2014-01-17 | 2 | -0/+117 |
| |\| | | | |/ | |/| | memory_unpack | ||||
| | * | Added automatic memid generation to memory_unpack command | Clifford Wolf | 2014-01-17 | 1 | -2/+2 |
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| | * | Added memory_unpack command | Clifford Wolf | 2014-01-17 | 2 | -0/+117 |
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* | | | slice error corrected | Ahmed Irfan | 2014-01-16 | 1 | -5/+5 |
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* | | | width issues | Ahmed Irfan | 2014-01-15 | 2 | -65/+88 |
| | | | | | | | | | | | | dff cell for more than one registers | ||||
* | | | Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor | Ahmed Irfan | 2014-01-15 | 4 | -15/+60 |
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| * | | Merge pull request #2 from cliffordwolf/master | Ahmed Irfan | 2014-01-15 | 4 | -15/+60 |
| |\| | | | | | | | hierarchy | ||||
| | * | Merge pull request #20 from mschmoelzer/master | Clifford Wolf | 2014-01-14 | 1 | -0/+1 |
| | |\ | | | | | | | | | Include unistd.h in passes/hierarchy/hierarchy.cc (required for access(3)) | ||||
| | | * | Include unistd.h in passes/hierarchy/hierarchy.cc (required for access(3)) | Martin Schmölzer | 2014-01-14 | 1 | -0/+1 |
| | |/ | | | | | | | | | | | | | | | | This fixes compilation errors on Arch Linux. Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at> | ||||
| | * | Added hierarchy -libdir option | Clifford Wolf | 2014-01-14 | 1 | -4/+48 |
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| | * | renamed LibertyParer to LibertyParser | Clifford Wolf | 2014-01-14 | 3 | -9/+9 |
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| | * | Added "+" to list of liberty token characters | Clifford Wolf | 2014-01-14 | 1 | -2/+2 |
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* | | | BTOR backend | Ahmed Irfan | 2014-01-14 | 2 | -279/+334 |
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* | | | Merge branch 'master' of https://github.com/ahmedirfan1983/yosys into btor | Ahmed Irfan | 2014-01-14 | 7 | -72/+364 |
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| * | | Merge pull request #1 from cliffordwolf/master | Ahmed Irfan | 2014-01-14 | 1 | -5/+71 |
| |\| | | | | | | | Added "opt_const -mux_undef" | ||||
| | * | Added "opt_const -mux_undef" | Clifford Wolf | 2014-01-14 | 1 | -5/+71 |
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| * | Fixed typo in frontends/ast/simplify.cc | Clifford Wolf | 2014-01-12 | 1 | -1/+1 |
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