Commit message (Expand) | Author | Age | Files | Lines | ||
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| * | | | | | | | | | | | | | | | | | | | Add MUXCY and XORCY to cells_box.v | Eddie Hung | 2019-04-16 | 2 | -0/+15 | |
| * | | | | | | | | | | | | | | | | | | | Fix wire numbering | Eddie Hung | 2019-04-16 | 1 | -1/+2 | |
| * | | | | | | | | | | | | | | | | | | | Do not put constants into output_bits | Eddie Hung | 2019-04-16 | 1 | -2/+2 | |
| * | | | | | | | | | | | | | | | | | | | Remove write_verilog call | Eddie Hung | 2019-04-16 | 1 | -1/+1 | |
| * | | | | | | | | | | | | | | | | | | | Fix spacing | Eddie Hung | 2019-04-16 | 2 | -2/+2 | |
| * | | | | | | | | | | | | | | | | | | | Merge branch 'xaig' into xc7mux | Eddie Hung | 2019-04-16 | 2 | -3/+1 | |
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| * | | | | | | | | | | | | | | | | | | | | NULL check before use | Eddie Hung | 2019-04-16 | 1 | -1/+1 | |
| * | | | | | | | | | | | | | | | | | | | | WIP for box support | Eddie Hung | 2019-04-16 | 1 | -36/+93 | |
| * | | | | | | | | | | | | | | | | | | | | ABC to read_box before reading netlist | Eddie Hung | 2019-04-16 | 1 | -1/+3 | |
| * | | | | | | | | | | | | | | | | | | | | Make cells.box whiteboxes not blackboxes | Eddie Hung | 2019-04-16 | 1 | -2/+2 | |
| * | | | | | | | | | | | | | | | | | | | | read_verilog cells_box.v before techmap | Eddie Hung | 2019-04-16 | 1 | -1/+1 | |
| * | | | | | | | | | | | | | | | | | | | | synth_xilinx: before abc read +/xilinx/cells_box.v | Eddie Hung | 2019-04-16 | 1 | -0/+1 | |
| * | | | | | | | | | | | | | | | | | | | | Add +/xilinx/cells_box.v containing models for ABC boxes | Eddie Hung | 2019-04-16 | 2 | -0/+11 | |
| * | | | | | | | | | | | | | | | | | | | | For 'stat' do not count modules with abc_box_id | Eddie Hung | 2019-04-16 | 1 | -0/+3 | |
| * | | | | | | | | | | | | | | | | | | | | Do not call abc on modules with abc_box_id attr | Eddie Hung | 2019-04-16 | 1 | -0/+3 | |
| * | | | | | | | | | | | | | | | | | | | | Revert "Add abc_box_id attribute to MUXF7/F8 cells" | Eddie Hung | 2019-04-16 | 1 | -2/+0 | |
| * | | | | | | | | | | | | | | | | | | | | Use abc_box_id | Eddie Hung | 2019-04-15 | 1 | -2/+1 | |
| * | | | | | | | | | | | | | | | | | | | | Check abc_box_id attr | Eddie Hung | 2019-04-15 | 1 | -1/+16 | |
| * | | | | | | | | | | | | | | | | | | | | Add abc_box_id attribute to MUXF7/F8 cells | Eddie Hung | 2019-04-15 | 1 | -0/+2 | |
| * | | | | | | | | | | | | | | | | | | | | Merge branch 'xaig' into xc7mux | Eddie Hung | 2019-04-15 | 9 | -100/+246 | |
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| * | | | | | | | | | | | | | | | | | | | | | PI before CI | Eddie Hung | 2019-04-12 | 1 | -2/+2 | |
| * | | | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7mux | Eddie Hung | 2019-04-12 | 1 | -3/+9 | |
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | Merge remote-tracking branch 'origin/pmux2shiftx' into xc7mux | Eddie Hung | 2019-04-11 | 1 | -1/+0 | |
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | Merge remote-tracking branch 'origin/pmux2shiftx' into xc7mux | Eddie Hung | 2019-04-11 | 6 | -8/+93 | |
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| * | | | | | | | | | | | | | | | | | | | | | | | | Fix cells_map.v some more | Eddie Hung | 2019-04-11 | 1 | -7/+7 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | More fine tuning | Eddie Hung | 2019-04-11 | 1 | -2/+2 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | Fix cells_map.v | Eddie Hung | 2019-04-11 | 1 | -7/+7 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | Fix typo | Eddie Hung | 2019-04-11 | 1 | -1/+1 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | Juggle opt calls in synth_xilinx | Eddie Hung | 2019-04-11 | 2 | -30/+35 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | Merge branch 'xaig' into xc7mux | Eddie Hung | 2019-04-10 | 1 | -1/+1 | |
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| * | | | | | | | | | | | | | | | | | | | | | | | | | WIP for cells_map.v -- maybe working? | Eddie Hung | 2019-04-10 | 1 | -32/+27 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | Try splitting $shiftx with Y_WIDTH > 1 into Y_WIDTH = 1 | Eddie Hung | 2019-04-10 | 1 | -31/+38 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | Fix for when B_SIGNED = 1 | Eddie Hung | 2019-04-10 | 1 | -1/+8 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | Update doc for synth_xilinx | Eddie Hung | 2019-04-10 | 1 | -7/+8 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | Merge branch 'xaig' into xc7mux | Eddie Hung | 2019-04-10 | 1 | -24/+21 | |
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| * | | | | | | | | | | | | | | | | | | | | | | | | | | ff_map.v after abc | Eddie Hung | 2019-04-10 | 1 | -5/+5 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | Tidy up | Eddie Hung | 2019-04-10 | 1 | -1/+1 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | Move map_cells to before map_luts | Eddie Hung | 2019-04-10 | 1 | -11/+12 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | WIP for $shiftx to wide mux | Eddie Hung | 2019-04-10 | 1 | -1/+63 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | Update LUT delays | Eddie Hung | 2019-04-10 | 1 | -11/+8 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | Add cells.lut to techlibs/xilinx/ | Eddie Hung | 2019-04-09 | 2 | -0/+16 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | synth_xilinx to call abc with -lut +/xilinx/cells.lut | Eddie Hung | 2019-04-09 | 1 | -2/+2 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | Add delays to cells.box | Eddie Hung | 2019-04-09 | 1 | -4/+12 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | Add "-lut <file>" support to abc9 | Eddie Hung | 2019-04-09 | 1 | -13/+31 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | synth_xilinx with abc9 to use -box | Eddie Hung | 2019-04-09 | 1 | -1/+4 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | Add techlibs/xilinx/cells.box | Eddie Hung | 2019-04-09 | 2 | -0/+6 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | Add "-box" option to abc9 | Eddie Hung | 2019-04-09 | 1 | -7/+22 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | Add 'setundef -zero' call prior to aigmap in abc9 | Eddie Hung | 2019-04-09 | 1 | -0/+4 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | Comment out | Eddie Hung | 2019-04-09 | 1 | -1/+1 | |
| * | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for synth_xilinx -abc9 and ignore abc9 -dress opt | Eddie Hung | 2019-04-09 | 2 | -1/+14 |