| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| | * | | | Update pmgen documentation | Clifford Wolf | 2019-05-03 | 1 | -6/+18 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | Fix typo | Clifford Wolf | 2019-05-03 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | Add peepopt_muldiv, fixes #930 | Clifford Wolf | 2019-04-30 | 6 | -1/+86 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | pmgen progress | Clifford Wolf | 2019-04-30 | 4 | -13/+27 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | Run "peepopt" in generic "synth" pass and "synth_ice40" | Clifford Wolf | 2019-04-30 | 2 | -0/+4 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | Some pmgen reorg, rename peepopt.pmg to peepopt_shiftmul.pmg | Clifford Wolf | 2019-04-30 | 3 | -4/+6 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | Progress in shiftmul peepopt pattern | Clifford Wolf | 2019-04-30 | 1 | -3/+51 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | Add "peepopt" skeleton | Clifford Wolf | 2019-04-29 | 5 | -1/+112 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | Add pmgen support for multiple patterns in one matcher | Clifford Wolf | 2019-04-29 | 3 | -130/+188 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | Support multiple pmg files (right now just concatenated together) | Clifford Wolf | 2019-04-29 | 1 | -6/+30 | |
| | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | Merge pull request #984 from YosysHQ/eddie/fix_982 | Clifford Wolf | 2019-05-03 | 1 | -1/+2 | |
| |\ \ \ \ | | | | | | | | | | | dffinit to do nothing when (* init *) value is 1'bx | |||||
| | * | | | | Revert "synth_xilinx to call dffinit with -noreinit" | Eddie Hung | 2019-05-03 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | | | | | | This reverts commit 1f62dc9081feb4852b1848d01951f631853edb38. | |||||
| | * | | | | If init is 1'bx, do not add to dict as per @cliffordwolf | Eddie Hung | 2019-05-03 | 1 | -1/+2 | |
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| | * | | | | Revert "dffinit -noreinit to silently continue when init value is 1'bx" | Eddie Hung | 2019-05-03 | 1 | -12/+4 | |
| | | | | | | | | | | | | | | | | | | | | | This reverts commit aa081f83c791b1d666214776aaf744a80ce6a690. | |||||
| | * | | | | synth_xilinx to call dffinit with -noreinit | Eddie Hung | 2019-05-02 | 1 | -1/+1 | |
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| | * | | | | dffinit -noreinit to silently continue when init value is 1'bx | Eddie Hung | 2019-05-02 | 1 | -4/+12 | |
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| * | | | | | Merge pull request #976 from YosysHQ/clifford/fix974 | Clifford Wolf | 2019-05-03 | 3 | -0/+25 | |
| |\ \ \ \ \ | | | | | | | | | | | | | Fix width detection of memory access with bit slice | |||||
| | * | | | | | Add splitcmplxassign test case and silence splitcmplxassign warning | Clifford Wolf | 2019-05-01 | 2 | -0/+23 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | | | Fix width detection of memory access with bit slice, fixes #974 | Clifford Wolf | 2019-05-01 | 1 | -0/+2 | |
| | | |_|/ / | |/| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | Merge pull request #985 from YosysHQ/clifford/fix981 | Clifford Wolf | 2019-05-03 | 2 | -44/+81 | |
| |\ \ \ \ \ | | | | | | | | | | | | | Improve opt_expr and opt_clean handling of (partially) undriven and/or unused wires | |||||
| | * | | | | | Improve opt_expr and opt_clean handling of (partially) undriven and/or ↵ | Clifford Wolf | 2019-05-03 | 2 | -44/+81 | |
| | | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | unused wires, fixes #981 Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | Fix typo in tests/svinterfaces/runone.sh | Clifford Wolf | 2019-05-03 | 1 | -2/+2 | |
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | | | | | Merge pull request #979 from jakobwenzel/svinterfacesTestcase | Clifford Wolf | 2019-05-03 | 1 | -2/+2 | |
| |\ \ \ \ \ | |/ / / / |/| | | | | fail svinterfaces testcases on yosys error exit | |||||
| | * | | | | fail svinterfaces testcases on yosys error exit | Jakob Wenzel | 2019-05-02 | 1 | -2/+2 | |
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| * | | | | Merge pull request #963 from YosysHQ/eddie/synth_xilinx_fine | Clifford Wolf | 2019-05-02 | 3 | -34/+30 | |
| |\ \ \ \ | | | | | | | | | | | Revert synth_xilinx 'fine' label more to how it used to be... | |||||
| | * | | | | Back to passing all xc7srl tests! | Eddie Hung | 2019-05-01 | 1 | -5/+4 | |
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| | * | | | | Merge remote-tracking branch 'origin/master' into eddie/synth_xilinx_fine | Eddie Hung | 2019-05-01 | 22 | -190/+286 | |
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| | * | | | | | WIP | Eddie Hung | 2019-04-28 | 1 | -36/+22 | |
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| | * | | | | | Move neg-pol to pos-pol mapping from ff_map to cells_map.v | Eddie Hung | 2019-04-28 | 2 | -9/+12 | |
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| | * | | | | | Revert synth_xilinx 'fine' label more to how it used to be... | Eddie Hung | 2019-04-26 | 1 | -21/+40 | |
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| * | | | | | | Merge pull request #978 from ucb-bar/fmtfirrtl | Eddie Hung | 2019-05-01 | 1 | -25/+25 | |
| |\ \ \ \ \ \ | |_|/ / / / |/| | | | | | Re-indent firrtl.cc:struct memory - no functional change. | |||||
| | * | | | | | Re-indent firrtl.cc:struct memory - no functional change. | Jim Lawson | 2019-05-01 | 1 | -25/+25 | |
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| * | | | | | | Merge branch 'master' of github.com:YosysHQ/yosys | Eddie Hung | 2019-05-01 | 21 | -176/+273 | |
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| | * | | | | | Merge branch 'clifford/fix883' | Clifford Wolf | 2019-05-02 | 1 | -0/+1 | |
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| | | * | | | | | Add missing enable_undef to "sat -tempinduct-def", fixes #883 | Clifford Wolf | 2019-05-02 | 1 | -0/+1 | |
| | |/ / / / / | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | | | Merge pull request #977 from ucb-bar/fixfirrtlmem | Clifford Wolf | 2019-05-01 | 3 | -4/+64 | |
| | |\ \ \ \ \ | | | | | | | | | | | | | | | Fix #938 - Crash occurs in case when use write_firrtl command | |||||
| | | * | | | | | Fix #938 - Crash occurs in case when use write_firrtl command | Jim Lawson | 2019-05-01 | 3 | -4/+64 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing memory initialization. Sanity-check memory parameters. Add Cell pointer to memory object (for error reporting). | |||||
| | * | | | | | | Fix floating point exception in qwp, fixes #923 | Clifford Wolf | 2019-05-01 | 1 | -1/+1 | |
| | | |_|/ / / | |/| | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | | | Fix segfault in wreduce | Clifford Wolf | 2019-04-30 | 1 | -0/+2 | |
| | |/ / / / | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | | Disabled "final loop assignment" feature | Clifford Wolf | 2019-04-30 | 1 | -0/+2 | |
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | | Merge pull request #972 from YosysHQ/clifford/fix968 | Clifford Wolf | 2019-04-30 | 1 | -0/+7 | |
| | |\ \ \ \ | | | | | | | | | | | | | Add final loop variable assignment when unrolling for-loops | |||||
| | | * | | | | Add final loop variable assignment when unrolling for-loops, fixes #968 | Clifford Wolf | 2019-04-30 | 1 | -0/+7 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | * | | | | | Merge pull request #966 from YosysHQ/clifford/fix956 | Clifford Wolf | 2019-04-30 | 3 | -3/+55 | |
| | |\ \ \ \ \ | | | | | | | | | | | | | | | Drive dangling wires with init attr with their init value | |||||
| | | * | | | | | Add handling of init attributes in "opt_expr -undriven" | Clifford Wolf | 2019-04-30 | 2 | -3/+42 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| | | * | | | | | Drive dangling wires with init attr with their init value, fixes #956 | Clifford Wolf | 2019-04-29 | 1 | -0/+13 | |
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| | * | | | | | Merge pull request #962 from YosysHQ/eddie/refactor_synth_xilinx | Clifford Wolf | 2019-04-30 | 2 | -156/+101 | |
| | |\ \ \ \ \ | | | | | | | | | | | | | | | Refactor synth_xilinx to auto-generate doc | |||||
| | | * \ \ \ \ | Merge branch 'master' into eddie/refactor_synth_xilinx | Clifford Wolf | 2019-04-30 | 9 | -12/+40 | |
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| | * | | | | | | Merge pull request #973 from christian-krieg/feature/python_bindings | Clifford Wolf | 2019-04-30 | 3 | -4/+4 | |
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | Feature/python bindings cleanup | |||||
| | | * \ \ \ \ \ | Merge branch 'master' of https://github.com/YosysHQ/yosys into ↵ | Benedikt Tutzer | 2019-04-30 | 88 | -320/+2797 | |
| | | |\ \ \ \ \ \ | | | | |_|/ / / | | | |/| | | | | | | | | | | | | feature/python_bindings | |||||
| | | * | | | | | | Cleaned up root directory | Benedikt Tutzer | 2019-04-30 | 3 | -4/+4 | |
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index : iCE40/yosys | |
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