| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | throw exception when member is NULL | Benedikt Tutzer | 2018-12-06 | 1 | -0/+3 |
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| * | added all variable in __init__.py to allow importing of the whole module | Benedikt Tutzer | 2018-10-25 | 1 | -0/+2 |
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| * | changed dlopen flags to support plugins | Benedikt Tutzer | 2018-10-25 | 1 | -0/+3 |
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| * | removed debug output from make | Benedikt Tutzer | 2018-10-25 | 1 | -1/+1 |
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| * | removed deletes | Benedikt Tutzer | 2018-10-25 | 1 | -1/+1 |
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| * | added py_wrap_generator | Benedikt Tutzer | 2018-10-25 | 1 | -0/+2098 |
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| * | Exposed generator script to make-process | Benedikt Tutzer | 2018-09-19 | 3 | -3893/+19 |
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| * | added functions whose definitions are split over multiple lines | Benedikt Tutzer | 2018-08-23 | 1 | -0/+60 |
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| * | added default yosys license text | Benedikt Tutzer | 2018-08-23 | 1 | -0/+19 |
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| * | Fixed segfault / multiple free issue with lists | Benedikt Tutzer | 2018-08-23 | 1 | -26/+38 |
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| * | Do not pass heap object to Python. This way they should be completely ↵ | Benedikt Tutzer | 2018-08-22 | 1 | -323/+337 |
| | | | | | managed by Python and destroyed when out of scope. Also, the file in which a function/struct was found is added to the comment before the function | ||||
| * | Fixed Identation | Benedikt Tutzer | 2018-08-22 | 1 | -189/+188 |
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| * | Wrapped functions that use unsigned int or type_t as types | Benedikt Tutzer | 2018-08-21 | 1 | -7/+127 |
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| * | added operators <, == and != | Benedikt Tutzer | 2018-08-21 | 1 | -0/+45 |
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| * | Added previousely missed functions | Benedikt Tutzer | 2018-08-21 | 1 | -1/+445 |
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| * | Deleted duplicate Destructor | Benedikt Tutzer | 2018-08-21 | 1 | -1/+0 |
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| * | added some checks if python is enabled to make sure everything compiles if ↵ | Benedikt Tutzer | 2018-08-20 | 5 | -7/+12 |
| | | | | | python is disabled in the makefile | ||||
| * | Two passes are not allowed to have the same filename | Benedikt Tutzer | 2018-08-20 | 1 | -1/+1 |
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| * | The share directory cannot be searched when used as a Python library, only ↵ | Benedikt Tutzer | 2018-08-20 | 2 | -1/+8 |
| | | | | | in shell mode | ||||
| * | Python passes are now looked for in share/plugins and can be added by ↵ | Benedikt Tutzer | 2018-08-20 | 2 | -24/+5 |
| | | | | | specifying a relative or absolute path | ||||
| * | Fixed issue when using a python plugin in the yosys shell | Benedikt Tutzer | 2018-08-20 | 3 | -4/+28 |
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| * | Python Passes can now be added with the -m option or with the plugin ↵ | Benedikt Tutzer | 2018-08-16 | 5 | -2/+160 |
| | | | | | command. There are still issues when run in shell mode, but they can be used just fine in a python script | ||||
| * | Added Wrappers for: | Benedikt Tutzer | 2018-08-13 | 4 | -144/+2925 |
| | | | | | | | | | | | | | | | | -IdString -Const -CaseRule -SwitchRule -SyncRule -Process -SigChunk -SigBit -SigSpec With all their member functions as well as the remaining member functions for Cell, Wire, Module and Design and static functions of rtlil.h | ||||
| * | Saving id and pointer to c++ object. Object is valid only if both id and ↵ | Benedikt Tutzer | 2018-08-01 | 1 | -8/+29 |
| | | | | | pointer match the pair saved in the corresponding map in kernel/rtlil.cc. Otherwise, the object was destroyed in c++ and should not be accessed any more | ||||
| * | Setup is called automatically when the module is loaded, shutdown when ↵ | Benedikt Tutzer | 2018-08-01 | 1 | -16/+19 |
| | | | | | python exits | ||||
| * | Cleaned up comments | Benedikt Tutzer | 2018-08-01 | 1 | -9/+3 |
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| * | removed unused library and already present compiler flag | Benedikt Tutzer | 2018-08-01 | 1 | -3/+3 |
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| * | Added Monitor class that can monitor all changes in a Design or in a Module | Benedikt Tutzer | 2018-07-10 | 1 | -0/+119 |
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| * | added destructors for wires and cells | Benedikt Tutzer | 2018-07-10 | 2 | -1/+16 |
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| * | removed debug output | Benedikt Tutzer | 2018-07-09 | 1 | -1/+0 |
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| * | commands can now be run on arbitrary designs, not only on the active one | Benedikt Tutzer | 2018-07-09 | 1 | -0/+10 |
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| * | multiple designs can now exist independent from each other. ↵ | Benedikt Tutzer | 2018-07-09 | 3 | -45/+118 |
| | | | | | Cells/Wires/Modules can now move to a different parent without referencing issues | ||||
| * | Introduced namespace and removed class-prefixes to increase readability | Benedikt Tutzer | 2018-06-28 | 1 | -163/+165 |
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| * | changed references from hash-ids to IdString names | Benedikt Tutzer | 2018-06-28 | 1 | -64/+32 |
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| * | added wrappers for Design, Modules, Cells and Wires | Benedikt Tutzer | 2018-06-25 | 2 | -0/+245 |
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| * | added ENABLE_PYTHON option in build environment | Benedikt Tutzer | 2018-06-22 | 1 | -1/+10 |
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| * | Add simplified "read" command, enable extnets in implicit Verific import | Clifford Wolf | 2018-06-21 | 1 | -0/+84 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Merge branch 'master' of github.com:YosysHQ/yosys | Clifford Wolf | 2018-06-20 | 1 | -1/+1 |
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| | * | Merge pull request #572 from q3k/q3k/fix-protobuf-build | Clifford Wolf | 2018-06-20 | 1 | -1/+1 |
| | |\ | | | | | | | Fix protobuf build | ||||
| | | * | Fix protobuf build | Sergiusz Bazanski | 2018-06-20 | 1 | -1/+1 |
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| * / | Add automatic verific import in hierarchy command | Clifford Wolf | 2018-06-20 | 3 | -1/+75 |
| |/ | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Merge pull request #571 from q3k/q3k/protobuf-backend | Clifford Wolf | 2018-06-19 | 5 | -0/+560 |
| |\ | | | | | Add Protobuf backend | ||||
| | * | Add Protobuf backend | Serge Bazanski | 2018-06-19 | 5 | -0/+560 |
| | | | | | | | | | Signed-off-by: Serge Bazanski <q3k@symbioticeda.com> | ||||
| * | | Be slightly less aggressive in "deminout" pass | Clifford Wolf | 2018-06-19 | 1 | -4/+28 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Merge pull request #570 from edcote/patch-4 | Clifford Wolf | 2018-06-19 | 1 | -4/+4 |
| |\ \ | |/ |/| | Include module name for area summary stats | ||||
| | * | Include module name for area summary stats | Edmond Cote | 2018-06-18 | 1 | -4/+4 |
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | The PR prints the name of the module when displaying the final area count. Pros: - Easier for the user to `grep` for area information about a specific module Cons: - Arguably more verbose, less "pretty" than author desires Verification: ~~~~ 30c30 < Chip area for this module: 20616.349000 --- > Chip area for module '$paramod$d1738fc0bb353d517bc2caf8fef2abb20bced034\picorv32': 20616.349000 70c70 < Chip area for this module: 88.697700 --- > Chip area for module '\picorv32_axi_adapter': 88.697700 102c102 < Chip area for this module: 20705.046700 --- > Chip area for top module '\picorv32_axi': 20705.046700 ~~~~ | ||||
| * | Bugfix in liberty parser (as suggested by aiju in #569) | Clifford Wolf | 2018-06-15 | 1 | -1/+1 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add "synth_ice40 -json" | Clifford Wolf | 2018-06-13 | 1 | -9/+22 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Fix ice40_opt for cases where a port is connected to a signal with width != 1 | Clifford Wolf | 2018-06-11 | 1 | -9/+25 |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Merge pull request #561 from udif/pr_skip_typo | Clifford Wolf | 2018-06-06 | 1 | -1/+1 |
| |\ | | | | | Fixed typo (sikp -> skip) | ||||
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index : iCE40/yosys | |
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