iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Wrong way around	Eddie Hung	2019-08-10	1	-2/+2
*	cover_list -> cover as per @cliffordwolf	Eddie Hung	2019-08-10	1	-2/+2
*	Grammar	Eddie Hung	2019-08-09	1	-1/+1
*	Separate $alu handling	Eddie Hung	2019-08-09	1	-7/+50
*	Add $alu tests	Eddie Hung	2019-08-09	1	-0/+42
*	opt_expr -fine to trim LSBs of $alu too	Eddie Hung	2019-08-09	1	-4/+9
*	Add alumacc versions of opt_expr tests	Eddie Hung	2019-08-09	1	-0/+84
*	Add new $alu test, remove wreduce	Eddie Hung	2019-08-09	1	-11/+21
*	Cleanup some more	Eddie Hung	2019-08-09	1	-12/+0
*	Simplify opt_expr tests using equiv_opt	Eddie Hung	2019-08-09	1	-72/+23
*	Merge pull request #1264 from YosysHQ/eddie/fix_1254	Eddie Hung	2019-08-08	1	-0/+6
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\| *	opt_lut to ignore LUT cells, or those that drive bits, with (* keep *)	Eddie Hung	2019-08-07	1	-0/+6
* \|	Merge pull request #1266 from YosysHQ/eddie/ice40_full_adder	Eddie Hung	2019-08-08	20	-180/+180
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\| *	Remove dump call	Eddie Hung	2019-08-07	1	-1/+0
\| *	Move tests/various/opt* into tests/opt/	Eddie Hung	2019-08-07	5	-1/+1
\| *	Remove ice40_unlut call, simply do equiv_opt on synth_ice40	Eddie Hung	2019-08-07	1	-3/+1
\| *	Add testcase from removed opt_ff.{v,ys}	Eddie Hung	2019-08-07	1	-0/+32
\| *	Remove tests/opt/opt_ff.{v,ys} as they don't seem to do anything but run	Eddie Hung	2019-08-07	2	-24/+0
\| *	Allow whitebox modules to be overwritten	Eddie Hung	2019-08-07	2	-3/+1
\| *	Update CHANGELOG	Eddie Hung	2019-08-07	1	-0/+2
\| *	Add ice40_wrapcarry pass, rename $__ICE40_FULL_ADDER -> CARRY_WRAPPER	Eddie Hung	2019-08-07	6	-10/+128
\| *	Add test	Eddie Hung	2019-08-07	1	-1/+10
\| *	Remove ice40_unlut	Eddie Hung	2019-08-07	2	-107/+0
\| *	Wrap SB_CARRY+SB_LUT into $__ICE40_FULL_ADDER	Eddie Hung	2019-08-07	3	-39/+14
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*	Merge pull request #1248 from YosysHQ/eddie/abc9_speedup	Eddie Hung	2019-08-07	4	-40/+48
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\| *	Add comment	Eddie Hung	2019-08-07	1	-2/+3
\| *	Revert "Add TODO"	Eddie Hung	2019-08-07	1	-2/+0
\| *	Add TODO	Eddie Hung	2019-08-07	1	-0/+2
\| *	Compute box_lookup just once	Eddie Hung	2019-08-07	1	-8/+24
\| *	Run "clean" on mapped_mod in its own design	Eddie Hung	2019-08-07	2	-24/+10
\| *	Run "clean -purge" on holes_module in its own design	Eddie Hung	2019-08-07	1	-6/+11
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*	Merge pull request #1260 from YosysHQ/dave/ecp5_cell_fixes	David Shah	2019-08-07	1	-101/+244
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\| *	ecp5: Make cells_sim.v consistent with nextpnr	David Shah	2019-08-07	1	-101/+244
* \|	Merge pull request #1213 from YosysHQ/eddie/wreduce_add	Clifford Wolf	2019-08-07	5	-3/+226
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\| * \|	Add signed opt_expr tests	Eddie Hung	2019-08-06	1	-0/+50
\| * \|	Add signed test	Eddie Hung	2019-08-06	1	-0/+26
\| * \|	Move LSB-trimming functionality from wreduce to opt_expr	Eddie Hung	2019-08-06	2	-23/+26
\| * \|	Add SigSpec::extract_end() convenience function	Eddie Hung	2019-08-06	1	-0/+1
\| * \|	Restore original SigSpec::extract()	Eddie Hung	2019-08-06	1	-1/+1
\| * \|	Move LSB tests from wreduce to opt_expr	Eddie Hung	2019-08-06	2	-99/+101
\| * \|	Merge remote-tracking branch 'origin/master' into eddie/wreduce_add	Eddie Hung	2019-08-06	56	-172/+763
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\| * \| \|	Try and fix again	Eddie Hung	2019-07-19	1	-5/+4
\| * \| \|	Add another test	Eddie Hung	2019-07-19	1	-1/+24
\| * \| \|	Do not access beyond bounds	Eddie Hung	2019-07-19	1	-1/+1
\| * \| \|	Add an SigSpec::at(offset, defval) convenience method	Eddie Hung	2019-07-19	1	-0/+1
\| * \| \|	Wrap A and B in sigmap	Eddie Hung	2019-07-19	1	-2/+2
\| * \| \|	Remove "top" from message	Eddie Hung	2019-07-19	1	-1/+1
\| * \| \|	Also optimise MSB of $sub	Eddie Hung	2019-07-19	1	-3/+3
\| * \| \|	Add one more test with trimming Y_WIDTH of $sub	Eddie Hung	2019-07-19	1	-11/+14
\| * \| \|	Be more explicit	Eddie Hung	2019-07-19	1	-6/+29