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| * | | | | | | CleanupEddie Hung2020-01-021-2/+1
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| * | | | | | | Merge remote-tracking branch 'origin/xaig_dff' into eddie/abc9_refactorEddie Hung2020-01-0222-1059/+981
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| | * | | | | | Combine tests to check multiple clock domainsEddie Hung2020-01-021-33/+10
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| | * | | | | | synth_xilinx -dff to work with abc tooEddie Hung2020-01-021-6/+14
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| | * | | | | | Merge remote-tracking branch 'origin/master' into xaig_dffEddie Hung2020-01-0227-92/+160
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| | * | | | | | Add 'abc9 -dff' to CHANGELOGEddie Hung2020-01-021-0/+1
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| | * | | | | | Update docEddie Hung2020-01-021-4/+4
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| | * | | | | | Update commentsEddie Hung2020-01-021-11/+6
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| | * | | | | | abc9 -keepff -> -dff; refactor dff operationsEddie Hung2020-01-024-166/+135
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| | * | | | | | Clamp -46ps for FDPE* tooEddie Hung2020-01-011-2/+2
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| | * | | | | | Get rid of (* abc9_keep *) in write_xaiger tooEddie Hung2020-01-011-15/+18
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| | * | | | | | Cleanup abc9, update doc for -keepff optionEddie Hung2020-01-011-6/+5
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| | * | | | | | Restore abc9 -keepffEddie Hung2020-01-014-128/+46
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| | * | | | | | attributes.count() -> get_bool_attribute()Eddie Hung2020-01-012-3/+3
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| | * | | | | | Re-arrange FD orderEddie Hung2019-12-313-182/+182
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| | * | | | | | Missing characterEddie Hung2019-12-311-1/+1
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| | * | | | | | Cleanup xilinx boxesEddie Hung2019-12-312-391/+425
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| | * | | | | | Cleanup ice40 boxesEddie Hung2019-12-313-30/+43
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| | * | | | | | Cleanup ecp5 boxesEddie Hung2019-12-314-35/+31
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| | * | | | | | parse_xaiger to not take box_lookupEddie Hung2019-12-314-63/+37
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| | * | | | | | parse_xaiger to reorder ports tooEddie Hung2019-12-311-41/+26
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| | * | | | | | Add some abc9 dff testsEddie Hung2019-12-311-0/+55
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| | * | | | | | Do not re-order carry chain ports, just precompute iteration orderEddie Hung2019-12-312-44/+32
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| | * | | | | | Update abc9_xc7.box commentsEddie Hung2019-12-311-18/+18
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| | * | | | | | FDCE ports to be alphabeticalEddie Hung2019-12-311-3/+3
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| | * | | | | | Fix attributes on $__ABC9_ASYNC[01] whiteboxEddie Hung2019-12-311-2/+2
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| | * | | | | | Fix incorrect $__ABC9_ASYNC[01] boxEddie Hung2019-12-311-2/+2
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| | * | | | | | write_xaiger: be more precise with ff_bits, remove ff_aig_mapEddie Hung2019-12-311-21/+19
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| | * | | | | | Retry getting rid of write_xaiger's holes_modeEddie Hung2019-12-311-81/+41
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| | * | | | | | Revert "Get rid of holes_mode"Eddie Hung2019-12-301-35/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 7997e2a90fd37886241b7eb657408177ef7f6fa7.
| * | | | | | | Merge remote-tracking branch 'origin/master' into eddie/abc9_refactorEddie Hung2020-01-0240-117/+192
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| | * | | | | | Merge pull request #1604 from whitequark/unify-ram-namingwhitequark2020-01-0218-40/+67
| | |\ \ \ \ \ \ | | | |_|/ / / / | | |/| | | | | Harmonize BRAM/LUTRAM descriptions across all of Yosys
| | | * | | | | Harmonize BRAM/LUTRAM descriptions across all of Yosys.whitequark2020-01-0118-40/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit: * renames all remaining instances of "DRAM" (which is ambiguous) to "LUTRAM" (which is not), finishing the work started in the commit 698ab9be; * renames memory rule files to brams.txt/lutrams.txt; * adds/renames script labels map_bram/map_lutram; * extracts where necessary script labels map_ffram and map_gates; * adds where necessary options -nobram/-nolutram. The end result is that BRAM/LUTRAM/FFRAM aspects of every target are now consistent with each other. Per architecture: * anlogic: rename drams.txt→lutrams.txt, add -nolutram, add :map_lutram, :map_ffram, :map_gates * ecp5: rename bram.txt→brams.txt, lutram.txt→lutrams.txt * efinix: rename bram.txt→brams.txt, add -nobram, add :map_ffram, :map_gates * gowin: rename bram.txt→brams.txt, dram.txt→lutrams.txt, rename -nodram→-nolutram (-nodram still recognized), rename :bram→:map_bram, :dram→:map_lutram, add :map_ffram, :map_gates
| | * | | | | | Merge pull request #1609 from YosysHQ/clifford/fix1596Clifford Wolf2020-01-021-4/+25
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | Always create $shl, $shr, $sshl, $sshr cells with unsigned B inputs
| | | * | | | | | Always create $shl, $shr, $sshl, $sshr cells with unsigned B inputsClifford Wolf2020-01-021-4/+25
| | | | |_|_|/ / | | | |/| | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * | | | | | Merge pull request #1601 from YosysHQ/eddie/synth_retimeEddie Hung2020-01-0213-48/+52
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | "abc -dff" to no longer retime by default
| | | * | | | | | Update doc that "-retime" calls abc with "-dff -D 1"Eddie Hung2019-12-3011-12/+12
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| | | * | | | | | Disable synth_gowin -abc9 as it offers no advantages yetEddie Hung2019-12-301-12/+12
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| | | * | | | | | Revert "Revert "synth_* with -retime option now calls abc with -D 1 as well""Eddie Hung2019-12-3011-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 6008bb7002f874e5c748eaa2050e7b6c17b32745.
| | | * | | | | | Revert "ABC to call retime all the time"Eddie Hung2019-12-301-11/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 9aa94370a54c016421740d2ce32ef0aa338d0dbd.
| | * | | | | | | Merge pull request #1608 from YosysHQ/eddie/ifndef_YOSYSEddie Hung2020-01-021-6/+6
| | |\ \ \ \ \ \ \ | | | |_|/ / / / / | | |/| | | | | | ifdef __ICARUS__ -> ifndef YOSYS
| | | * | | | | | ifdef __ICARUS__ -> ifndef YOSYSEddie Hung2020-01-011-6/+6
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| | * | | | | | Merge pull request #1606 from YosysHQ/eddie/improve_testsEddie Hung2020-01-0110-19/+20
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | Fix a few issues in tests/arch/*
| | | * | | | | | Revert insertion of 'reg', leave note behindEddie Hung2020-01-011-1/+2
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| | | * | | | | | Fix anlogic async flop mappingEddie Hung2020-01-011-8/+8
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| | | * | | | | | Do not do call equiv_opt when no sim model existsEddie Hung2019-12-312-4/+4
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| | | * | | | | | Fix warningsEddie Hung2019-12-312-2/+2
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| | | * | | | | | Call equiv_opt with -multiclock and -assertEddie Hung2019-12-315-5/+5
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| | * | | | | | Merge pull request #1605 from YosysHQ/iopad_fixMiodrag Milanović2020-01-012-0/+22
| | |\ \ \ \ \ \ | | | |/ / / / / | | |/| | | | | iopad mapping should take care of existing io buffers
| | | * | | | | Added a test caseMiodrag Milanovic2020-01-011-0/+19
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