diff options
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/various/submod.ys | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/tests/various/submod.ys b/tests/various/submod.ys index a0a3f2da5..552fd4e01 100644 --- a/tests/various/submod.ys +++ b/tests/various/submod.ys @@ -52,8 +52,10 @@ sat -verify -prove-asserts -show-ports miter design -reset read_verilog -icells <<EOT -module top(input d, c, (* init = 1'b1 *) output reg q); -(* submod="bar" *) DFF s1(.D(d), .C(c), .Q(q)); +module top(input d, c, (* init = 3'b011 *) output reg [2:0] q); +(* submod="bar" *) DFF s1(.D(d), .C(c), .Q(q[1])); +DFF s2(.D(d), .C(c), .Q(q[0])); +DFF s3(.D(d), .C(c), .Q(q[2])); endmodule module DFF(input D, C, output Q); @@ -62,6 +64,7 @@ endmodule EOT hierarchy -top top +proc submod dffinit -ff DFF Q INIT |