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-rw-r--r--tests/various/const_arg_loop.v44
-rw-r--r--tests/various/const_arg_loop.ys1
2 files changed, 45 insertions, 0 deletions
diff --git a/tests/various/const_arg_loop.v b/tests/various/const_arg_loop.v
new file mode 100644
index 000000000..85318562f
--- /dev/null
+++ b/tests/various/const_arg_loop.v
@@ -0,0 +1,44 @@
+module top;
+ function automatic [31:0] operation1;
+ input [4:0] rounds;
+ input integer num;
+ integer i;
+ begin
+ begin : shadow
+ integer rounds;
+ rounds = 0;
+ end
+ for (i = 0; i < rounds; i = i + 1)
+ num = num * 2;
+ operation1 = num;
+ end
+ endfunction
+
+ function automatic [31:0] operation2;
+ input [4:0] var;
+ input integer num;
+ begin
+ var[0] = var[0] ^ 1;
+ operation2 = num * var;
+ end
+ endfunction
+
+ wire [31:0] a;
+ assign a = 2;
+
+ parameter A = 3;
+
+ wire [31:0] x1;
+ assign x1 = operation1(A, a);
+
+ wire [31:0] x2;
+ assign x2 = operation2(A, a);
+
+// `define VERIFY
+`ifdef VERIFY
+ assert property (a == 2);
+ assert property (A == 3);
+ assert property (x1 == 16);
+ assert property (x2 == 4);
+`endif
+endmodule
diff --git a/tests/various/const_arg_loop.ys b/tests/various/const_arg_loop.ys
new file mode 100644
index 000000000..b039bda10
--- /dev/null
+++ b/tests/various/const_arg_loop.ys
@@ -0,0 +1 @@
+read_verilog const_arg_loop.v