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-rw-r--r--tests/simple/memory.v14
1 files changed, 12 insertions, 2 deletions
diff --git a/tests/simple/memory.v b/tests/simple/memory.v
index f38bdafd3..b478d9409 100644
--- a/tests/simple/memory.v
+++ b/tests/simple/memory.v
@@ -137,8 +137,13 @@ endmodule
// ----------------------------------------------------------
-module memtest06_sync(input clk, input rst, input [2:0] idx, input [7:0] din, output [7:0] dout);
+module memtest06_sync(clk, rst, idx, din, dout);
+ input clk;
+ input rst;
(* gentb_constant=0 *) wire rst;
+ input [2:0] idx;
+ input [7:0] din;
+ output [7:0] dout;
reg [7:0] test [0:7];
integer i;
always @(posedge clk) begin
@@ -156,8 +161,13 @@ module memtest06_sync(input clk, input rst, input [2:0] idx, input [7:0] din, ou
assign dout = test[idx];
endmodule
-module memtest06_async(input clk, input rst, input [2:0] idx, input [7:0] din, output [7:0] dout);
+module memtest06_async(clk, rst, idx, din, dout);
+ input clk;
+ input rst;
(* gentb_constant=0 *) wire rst;
+ input [2:0] idx;
+ input [7:0] din;
+ output [7:0] dout;
reg [7:0] test [0:7];
integer i;
always @(posedge clk or posedge rst) begin