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-rw-r--r--tests/xilinx_ug901/tristates_2.ys13
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diff --git a/tests/xilinx_ug901/tristates_2.ys b/tests/xilinx_ug901/tristates_2.ys
deleted file mode 100644
index ba2e1d855..000000000
--- a/tests/xilinx_ug901/tristates_2.ys
+++ /dev/null
@@ -1,13 +0,0 @@
-read_verilog tristates_2.v
-hierarchy -top tristates_2
-proc
-tribuf
-flatten
-synth
-equiv_opt -assert -map +/xilinx/cells_sim.v -map +/simcells.v synth_xilinx # equivalency check
-design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
-cd tristates_2 # Constrain all select calls below inside the top module
-#Vivado synthesizes 3 IBUF, 1 OBUFT.
-select -assert-count 1 t:LUT1
-select -assert-count 1 t:$_TBUF_
-select -assert-none t:LUT1 t:$_TBUF_ %% t:* %D