diff options
Diffstat (limited to 'tests/xilinx_ug901/presubmult.ys')
| -rw-r--r-- | tests/xilinx_ug901/presubmult.ys | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/tests/xilinx_ug901/presubmult.ys b/tests/xilinx_ug901/presubmult.ys deleted file mode 100644 index 831458dec..000000000 --- a/tests/xilinx_ug901/presubmult.ys +++ /dev/null @@ -1,23 +0,0 @@ -read_verilog presubmult.v -hierarchy -top presubmult -proc -flatten -equiv_opt -assert -map +/xilinx/cells_sim.v synth_xilinx # equivalency check -design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) - -cd presubmult -#Vivado synthesizes 1 DSP48E1. (When SIZEIN = 8) -stat -select -assert-count 1 t:BUFG -select -assert-count 51 t:FDRE -select -assert-count 75 t:LUT2 -select -assert-count 10 t:LUT3 -select -assert-count 24 t:LUT4 -select -assert-count 15 t:LUT5 -select -assert-count 136 t:LUT6 -select -assert-count 24 t:MUXCY -select -assert-count 46 t:MUXF7 -select -assert-count 14 t:MUXF8 -select -assert-count 26 t:XORCY - -select -assert-none t:BUFG t:FDRE t:LUT2 t:LUT3 t:LUT4 t:LUT5 t:LUT6 t:MUXCY t:MUXF7 t:MUXF8 t:XORCY %% t:* %D |