diff options
Diffstat (limited to 'tests/xilinx/counter.ys')
| -rw-r--r-- | tests/xilinx/counter.ys | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/tests/xilinx/counter.ys b/tests/xilinx/counter.ys new file mode 100644 index 000000000..b602b74d7 --- /dev/null +++ b/tests/xilinx/counter.ys @@ -0,0 +1,14 @@ +read_verilog counter.v +hierarchy -top top +proc +flatten +equiv_opt -map +/xilinx/cells_sim.v synth_xilinx # equivalency check +design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) +cd top # Constrain all select calls below inside the top module + +select -assert-count 1 t:BUFG +select -assert-count 8 t:FDCE +select -assert-count 1 t:LUT1 +select -assert-count 7 t:MUXCY +select -assert-count 8 t:XORCY +select -assert-none t:BUFG t:FDCE t:LUT1 t:MUXCY t:XORCY %% t:* %D |